CC2630_15 Datasheet, PDF (28/50 Pages) Texas Instruments – CC2630 SimpleLink 6LoWPAN / ZigBee Wireless MCU

CC2630
SWRS177 – FEBRUARY 2015
www.ti.com
6.8 Clock Systems
The CC2630 supports two external and two internal clock sources.
A 24 MHz crystal is required as the frequency reference for the radio. This signal is doubled internally to
create a 48 MHz clock.
The 32 kHz crystal is optional. The low-speed crystal oscillator is designed for use with a 32 kHz watch-
type crystal.
The internal high-speed oscillator (48 MHz) can be used as a clock source for the CPU subsystem.
The internal low-speed oscillator (32.768 kHz) can be used as a reference if the low-power crystal
oscillator is not used.
The 32 kHz clock source can be used as external clocking reference through GPIO.
6.9 General Peripherals and Modules
The I/O controller controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals
to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a
programmable pullup and pulldown function and can generate an interrupt on a negative or positive edge
(configurable). When configured as an output, pins can function as either push-pull or open-drain. Five
GPIOs have high drive capabilities (marked in bold in Section 4).
The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and Texas
Instruments synchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz.
The UART implements a universal asynchronous receiver/transmitter function. It supports flexible baud-
rate generation up to a maximum of 3 Mbps .
Timer 0 is a general-purpose timer module (GPTM), which provides two 16-bit timers. The GPTM can be
configured to operate as a single 32-bit timer, dual 16-bit timers or as a PWM module.
Timer 1, Timer 2, and Timer 3 are also GPTMs. Each of these timers is functionally equivalent to Timer 0.
In addition to these four timers, the RF core has its own timer to handle timing for RF protocols; the RF
timer can be synchronized to the RTC.
The I²C interface is used to communicate with devices compatible with the I²C standard. The I²C interface
is capable of 100 kHz and 400 kHz operation, and can serve as both I²C master and I²C slave.
The TRNG module provides a true, nondeterministic noise source for the purpose of generating keys,
initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring
oscillators that create unpredictable output to feed a complex nonlinear combinatorial circuit.
The watchdog timer is used to regain control if the system fails due to a software error after an external
device fails to respond as expected. The watchdog timer can generate an interrupt or a reset when a
predefined time-out value is reached.
The device includes a direct memory access (µDMA) controller. The µDMA controller provides a way to
offload data transfer tasks from the CM3 CPU, allowing for more efficient use of the processor and the
available bus bandwidth. The µDMA controller can perform transfer between memory and peripherals. The
µDMA controller has dedicated channels for each supported on-chip module and can be programmed to
automatically perform transfers between peripherals and memory as the peripheral is ready to transfer
more data. Some features of the µDMA controller include the following (this is not an exhaustive list):
• Highly flexible and configurable channel operation of up to 32 channels
• Transfer modes: Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-
peripheral
• Data sizes of 8, 16, and 32 bits
The AON domain contains circuitry that is always enabled, except for in Shutdown (where the digital
supply is off). This circuitry includes the following:
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