OMAP-L138_15 Datasheet, PDF (273/286 Pages) Texas Instruments – OMAP-L138 C6000™ DSP+ ARM® Processor

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OMAP-L138
SPRS586I – JUNE 2009 – REVISED SEPTEMBER 2014
• Function : Do a send-only JTAG IR/DR scan.
– Parameter : The route to JTAG shift state is 'shortest transition'.
– Parameter : The JTAG shift state is 'shift-dr'.
– Parameter : The JTAG destination state is 'pause-dr'.
– Parameter : The bit length of the command is '32'.
– Parameter : The send data value is '0xa3302108'.
– Parameter : The actual receive data is 'discarded'.
• Function : Do a send-only all-ones JTAG IR/DR scan.
– Parameter : The JTAG shift state is 'shift-ir'.
– Parameter : The JTAG destination state is 'run-test/idle'.
– Parameter : The bit length of the command is '6'.
– Parameter : The send data value is 'all-ones'.
– Parameter : The actual receive data is 'discarded'.
• Function : Wait for a minimum number of TCLK pulses.
– Parameter : The count of TCLK pulses is '10'.
• Function : Update the JTAG preamble and post-amble counts.
– Parameter : The IR pre-amble count is '0'.
– Parameter : The IR post-amble count is '6 + 4'.
– Parameter : The DR pre-amble count is '0'.
– Parameter : The DR post-amble count is '1 + 1'.
– Parameter : The IR main count is '4'.
– Parameter : The DR main count is '1'.
6.34.4 IEEE 1149.1 JTAG
The JTAG ⁽¹⁾ interface is used for BSDL testing and emulation of the device.
The device requires that both TRST and RESET be asserted upon power up to be properly initialized.
While RESET initializes the device, TRST initializes the device's emulation logic. Both resets are required
for proper operation.
While both TRST and RESET need to be asserted upon power up, only RESET needs to be released for
the device to boot properly. TRST may be asserted indefinitely for normal operation, keeping the JTAG
port interface and device's emulation logic in the reset state.
TRST only needs to be released when it is necessary to use a JTAG controller to debug the device or
exercise the device's boundary scan functionality. Note: TRST is synchronous and must be clocked by
TCK; otherwise, the boundary scan logic may not respond as expected after TRST is asserted.
RESET must be released only in order for boundary-scan JTAG to read the variant field of IDCODE
correctly. Other boundary-scan instructions work correctly independent of current state of RESET.
For maximum reliability, the device includes an internal pulldown (IPD) on the TRST pin to ensure that
TRST will always be asserted upon power up and the device's internal emulation logic will always be
properly initialized.
JTAG controllers from Texas Instruments actively drive TRST high. However, some third-party JTAG
controllers may not drive TRST high but expect the use of a pullup resistor on TRST.
When using this type of JTAG controller, assert TRST to initialize the device after powerup and externally
drive TRST high before attempting any emulation or boundary scan operations.
(1) IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
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Peripheral Information and Electrical Specifications 273
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