OMAP-L138_15 Datasheet, PDF (234/286 Pages) Texas Instruments – OMAP-L138 C6000™ DSP+ ARM® Processor

OMAP-L138
SPRS586I – JUNE 2009 – REVISED SEPTEMBER 2014
UHPI_HCS
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UHPI_HAS^(D)
1
UHPI_HCNTL[1:0]
1
UHPI_HR/W
1
UHPI_HHWIL
UHPI_HSTROBE^(A)(C)
2
2
2
3
1
2
1
2
1
2
4
3
UHPI_HD[15:0]
(input)
UHPI_HRDY^(B)
11
12
11
12
1st Half-Word
2nd Half-Word
5
13
18
13
5
18
A. UHPI_HSTROBE refers to the following logical operation on UHPI_HCS, UHPI_HDS1, and UHPI_HDS2: [NOT(HDS1 XOR HDS2)] OR
UHPI_HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-incrementing) and the
state of the FIFO, transitions on UHPI_HRDY may or may not occur.
C. UHPI_HCS reflects typical UHPI_HCS behavior when UHPI_HSTROBE assertion is caused by UHPI_HDS1 or UHPI_HDS2. UHPI_HCS
timing requirements are reflected by parameters for UHPI_HSTROBE.
D The diagram above assumes UHPI_HAS has been pulled high.
Figure 6-69. UHPI Write Timing (HAS Not Used, Tied High)
234 Peripheral Information and Electrical Specifications
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