DRV8880_15 Datasheet, PDF (27/48 Pages) Texas Instruments – DRV8880 2-A Stepper Motor Driver With AutoTune™

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DRV8880
SLVSD18A – JUNE 2015 – REVISED JULY 2015
7.3.8 Charge Pump
A charge pump is integrated in order to supply a high-side NMOS gate drive voltage. The charge pump requires
a capacitor between the VM and VCP pins. Additionally a low-ESR ceramic capacitor is required between pins
CPH and CPL.
0.47 µF
VM
VCP
0.1 µF
CPH
CPL
VM
Charge
VM
Pump
Figure 21. Charge Pump Diagram
7.3.9 LDO Voltage Regulator
An LDO regulator is integrated into the DRV8880. It can be used to provide the supply voltage for low-current
devices. For proper operation, bypass V3P3 to GND using a ceramic capacitor.
The V3P3 output is nominally 3.3 V. When the V3P3 LDO current load exceeds 10 mA, the LDO will behave like
a constant current source. The output voltage will drop significantly with currents greater than 10 mA.
VM
+
-
V3P3
3.3 V
10 mA
0.47 µF max
Figure 22. LDO Diagram
If a digital input needs to be tied permanently high (that is, M or TOFF), it is preferable to tie the input to V3P3
instead of an external regulator. This will save power when VM is not applied or in sleep mode: V3P3 is disabled
and current will not be flowing through the input pulldown resistors. For reference, logic level inputs have a
typical pulldown of 100 kΩ, and tri-level inputs have a typical pulldown of 40 kΩ.
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