English
Language : 

DRV8880_15 Datasheet, PDF (26/48 Pages) Texas Instruments – DRV8880 2-A Stepper Motor Driver With AutoTune™
DRV8880
SLVSD18A – JUNE 2015 – REVISED JULY 2015
www.ti.com
7.3.6 AutoTune
To enable the AutoTune mode, pull the ATE pin logic high. Ensure the DECAYx pins are logic low. The
AutoTune mode is registered internally when exiting from sleep mode or the power-up sequence. The ATE pin
can be shorted to V3P3 to pull it logic high for this purpose.
AutoTune greatly simplifies the decay mode selection by automatically configuring the decay mode between
slow, mixed, and fast decay. In mixed decay, AutoTune dynamically adjusts the fast decay percentage of the
total mixed decay time. This feature eliminates motor tuning by automatically determining the best decay setting
that results in the lowest ripple for the motor.
The decay mode setting is optimized iteratively each PWM cycle. If the motor current overshoots the target trip
level, then the decay mode becomes more aggressive (add fast decay percentage) on the next cycle in order to
prevent regulation loss. If there is a long drive time to reach the target trip level, the decay mode becomes less
aggressive (remove fast decay percentage) on the next cycle in order to operate with less ripple and more
efficiently. On falling steps, AutoTune will automatically switch to fast decay in order to reach the next step
quickly.
AutoTune will automatically adjust the decay scheme based on operating factors like:
• Motor winding resistance and inductance
• Motor aging effects
• Motor dynamic speed and load
• Motor supply voltage variation
• Motor back-EMF difference on rising and falling steps
• Step transitions
• Low-current vs. high-current dI/dt
7.3.7 Adaptive Blanking Time
After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a period of time before
enabling the current sense circuitry. Note that the blanking time also sets the minimum drive time of the PWM.
The blanking time is automatically scaled so that the drive time is reduced at lower current steps.
The time tBLANK is determined by the sine DAC code and the torque DAC setting. The timing information for
tBLANK is given in Table 8.
Table 8. Adaptive Blanking Time Settings over Torque DAC and Microsteps
SINE DAC CODE
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
00 – 100%
1.80 µs
1.80 µs
1.80 µs
1.80 µs
1.80 µs
1.80 µs
1.80 µs
1.80 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.20 µs
1.20 µs
0.90 µs
0.90 µs
TORQUE DAC TRQ[1:0] SETTING
01 – 75%
10 – 50%
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.50 µs
1.20 µs
1.50 µs
1.20 µs
1.50 µs
1.20 µs
1.50 µs
1.20 µs
1.20 µs
0.90 µs
1.20 µs
0.90 µs
0.90 µs
0.90 µs
0.90 µs
0.90 µs
11 – 25%
1.20 µs
1.20 µs
1.20 µs
1.20 µs
1.20 µs
1.20 µs
1.20 µs
1.20 µs
0.90 µs
0.90 µs
0.90 µs
0.90 µs
0.90 µs
0.90 µs
0.90 µs
0.90 µs
26
Submit Documentation Feedback
Product Folder Links: DRV8880
Copyright © 2015, Texas Instruments Incorporated