THS7360_1 Datasheet, PDF (25/43 Pages) Texas Instruments – 6-Channel Video Amplifier with 3-SD and 3-SD/ED/HD/Full-HD Fiters and High Gain

THS7360
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Because the internal gain is fixed, the gain dictates
what the allowable linear input voltage range can be
without clipping concerns. For example, if the power
supply is set to 3 V, the maximum output is
approximately 2.9 V while driving a significant amount
of current. Thus, to avoid clipping on the SD
channels, the allowable input is (2.9 V - 0.12V)/5.6 =
0.5 V. This range is valid for up to the maximum
recommended 5-V power supply that allows
approximately a (4.9 V – 0.12 V)/5.6 = 0.85 V input
range while avoiding clipping on the output.
The input impedance of the THS7360 in this mode of
operation is dictated by the internal, 800-kΩ
pull-down resistor, as shown in Figure 44. Note that
the internal voltage shift does not appear at the input
pin; it only shows at the output pin.
+V_S
Input
Pin
800 kW
Internal
Circuitry
Level
Shift
Figure 44. Equivalent DC Input Mode Circuit
INPUT MODE OF OPERATION: AC SYNC TIP
CLAMP
Some video DACs or encoders are not referenced to
ground but rather to the positive power supply. The
resulting video signals are generally at too great a
voltage for a dc-coupled video buffer to function
properly. To account for this scenario, the THS7360
incorporates a sync-tip clamp circuit. This function
requires a capacitor (nominally 0.1 mF) to be in series
with the input. Although the term sync-tip-clamp is
used throughout this document, it should be noted
that the THS7360 would probably be better termed as
a dc restoration circuit based on how this function is
performed. This circuit is an active clamp circuit and
not a passive diode clamp function.
The input to the THS7360 has an internal control loop
that sets the lowest input applied voltage to clamp at
ground (0 V). By setting the reference at 0 V, the
THS7360 allows a dc-coupled input to also function.
Therefore, the sync-tip-clamp (STC) is considered
transparent because it does not operate unless the
input signal goes below ground. The signal then goes
through the same level shifter, resulting in an output
voltage low level of 120 mV. If the input signal tries to
SLOS674 – JUNE 2010
go below 0 V, the THS7360 internal control loop
sources up to 6 mA of current to increase the input
voltage level on the THS7360 input side of the
coupling capacitor. As soon as the voltage goes
above the 0-V level, the loop stops sourcing current
and becomes very high impedance.
One of the concerns about the STC level is how the
clamp reacts to a sync edge that has
overshoot—common in VCR signals, noise, DAC
overshoot, or reflections found in poor printed circuit
board (PCB) layouts. Ideally, the STC should not
react to the overshoot voltage of the input signal.
Otherwise, this response could result in clipping on
the rest of the video signal because it may raise the
bias voltage too much.
To help minimize this input signal overshoot problem,
the control loop in the THS7360 has an internal
low-pass filter, as shown in Figure 45. This filter
reduces the response time of the STC circuit. This
delay is a function of how far the voltage is below
ground, but in general it is approximately a 400-ns
delay for the SD channel filters and approximately a
150-ns delay for the SF filters. The effect of this filter
is to slow down the response of the control loop so as
not to clamp on the input overshoot voltage but rather
the flat portion of the sync signal.
As a result of this delay, sync may have an apparent
voltage shift. The amount of shift depends on the
amount of droop in the signal as dictated by the input
capacitor and the STC current flow. Because sync is
used primarily for timing purposes, with syncing
occurring on the edge of the sync signal, this shift is
transparent in most systems.
Input
0.1 mF ^Input
Pin
+V_S
+V_S
STC LPF
g_m
800 kW
Internal
Circuitry
Level
Shift
Figure 45. Equivalent AC Sync-Tip-Clamp Input
Circuit
While this feature may not fully eliminate overshoot
issues on the input signal, in cases of extreme
overshoot and/or ringing, the STC system should help
minimize improper clamping levels. As an additional
method to help minimize this issue, an external
capacitor (for example, 10 pF to 47 pF) to ground in
parallel with the external termination resistors can
help filter overshoot problems.
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): THS7360
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