English
Language : 

THS7360_1 Datasheet, PDF (23/43 Pages) Texas Instruments – 6-Channel Video Amplifier with 3-SD and 3-SD/ED/HD/Full-HD Fiters and High Gain
THS7360
www.ti.com
INPUT OVERVOLTAGE PROTECTION
The THS7360 is built using a very high-speed,
complementary, bipolar CMOS process. The internal
junction breakdown voltages are relatively low for
these very small geometry devices. These
breakdowns are reflected in the Absolute Maximum
Ratings table. All input and output device pins are
protected with internal ESD protection diodes to the
power supplies, as shown in Figure 42.
+VS
External
Input/Output
Pin
Internal
Circuitry
Figure 42. Internal ESD Protection
SLOS674 – JUNE 2010
These diodes provide moderate protection to input
overdrive voltages above and below the supplies as
well. The protection diodes can typically support
30 mA of continuous current when overdriven.
TYPICAL CONFIGURATION AND VIDEO
TERMINOLOGY
A typical application circuit using the THS7360 as a
video buffer is shown in Figure 43. It shows a DAC or
encoder driving the input channels of the THS7360.
One channel is a CVBS connection while two other
channels are for the S-Video Y’/C’ signals of an SD
video system. These signals can be NTSC, PAL, or
SECAM signals. The other three channels are the
component video Y’/P’B/P’R (sometimes labeled
Y’U’V’ or incorrectly labeled Y’/C’B/C’R) signals. These
signals are typically 480i, 576i, 480p, 576p, 720p,
1080i, or up to 1080p60 signals. Because the filters
can be bypassed, other formats such as R'G'B' video
up to QXGA or UWXGA can also be supported with
the THS7360.
CVBS
S-Video Y’
S-Video C’
Y'/G'
P'B/B'
P'R/R'
THS7360
1 SD1 IN
SD1 OUT 20
R
2 SD2 IN
SD2 OUT 19
3 SD3 IN
SD3 OUT 18
4 NC
R
+2.7 V to
+5 V
5 VS+
6 NC
Disable SD 17
GND 16
Disable SF 15
Disable SD
Disable SF
7 SF1 IN
SF1 OUT 14
R
8 SF2 IN
SF2 OUT 13
9 SF3 IN
SF3 OUT 12
10 Bypass SD Bypass SF 11
R
Bypass
SD LPF
R
Bypass
SF LPF
R
CVBS
75 W
S-Video Y' Out
75 W
S-Video C' Out
75 W
Y'/G' Out
75 W
P'B/B' Out
75 W
P'R/R' Out
75 W
75 W
75 W
75 W
75 W
75 W
75 W
(1) SF indicates selectable filter.
Figure 43. Typical Six-Channel System Inputs from DC-Coupled Encoder/DAC with DC-Coupled Line
Driving
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): THS7360
Submit Documentation Feedback
23