THS7360_1 Datasheet, PDF (11/43 Pages) Texas Instruments – 6-Channel Video Amplifier with 3-SD and 3-SD/ED/HD/Full-HD Fiters and High Gain

THS7360
www.ti.com
SLOS674 – JUNE 2010
ELECTRICAL CHARACTERISTICS: V_S+ = +5 V (continued)
At T_A = +25°C, R_L = 150 Ω to GND, Filter mode, and dc-coupled input/output, unless otherwise noted.
THS7360
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
DC PERFORMANCE
Biased output voltage
Input voltage range
V_IN = 0 V, SD channels
V_IN = 0 V, SF channels
DC input, limited by output range
35
160
315
35
120
300
–0.1/1
Sync-tip clamp charge current
Input impedance
V_IN = –0.1 V, SD channels
V_IN = –0.1 V, SF channels
140
200
280
400
800 || 2
OUTPUT CHARACTERISTICS
High output voltage swing
Low output voltage swing
Output current (sourcing)
Output current (sinking)
POWER SUPPLY
R_L = 150 Ω to +2.5 V
R_L = 150 Ω to GND
R_L = 75 Ω to +2.5V
R_L = 75 Ω to GND
R_L = 150 Ω to +2.5 V (V_IN = –0.2 V)
R_L = 150 Ω to GND (V_IN = –0.2 V)
R_L = 75 Ω to +2.5 V (V_IN = –0.2 V)
R_L = 75 Ω to GND (V_IN = –0.2 V)
R_L = 10 Ω to +2.5 V
R_L = 10 Ω to +2.5 V
4.85
4.4
4.75
4.7
4.5
0.06
0.05
0.12
0.1
0.05
90
85
Operating voltage
2.6
5
5.5
Total quiescent current, no load
Power-supply rejection ratio
(PSRR)
LOGIC CHARACTERISTICS⁽⁵⁾
V_IN = 0 V, all channels on
V_IN = 0 V, SD channels on, SF channels off
V_IN = 0 V, SD channels off, SF channels on
V_IN = 0 V, all channels off, V_DISABLE = 3 V
At dc
19.7
6
13.7
25.5
7.5
18
0.5
56
31.2
9.5
21.7
10
V_IH
V_IL
I_IH
I_IL
Disable time
Disabled or Bypass engaged
Enabled or Bypass disengaged
Applied voltage = 3.3 V
Applied voltage = 0 V
2.1
1.9
1.2
1
1
1
100
Enable time
100
Bypass/filter switch time
10
(5) The logic input pins default to a logic '0' condition when left floating.
TEST
UNITS LEVEL⁽¹⁾
mV
A
mV
A
V
C
mA
A
mA
A
kΩ || pF
C
V
C
V
A
V
C
V
C
V
C
V
A
V
C
V
C
mA
C
mA
C
V
B
mA
A
mA
A
mA
A
mA
A
dB
C
V
A
V
A
mA
C
mA
C
ns
C
ns
C
ns
C
FILTER 1
0
0
1
1
X
FILTER 2
0
1
0
1
X
Table 2. TRUTH TABLE: V_S+ = +5 V⁽¹⁾
BYPASS SF
DESCRIPTION
0
Selects the standard definition filter (9.2 MHz) for the SF channels
0
Selects the enhanced definition filter (17 MHz) for the SF channels
0
Selects the high-definition filter (35 MHz) for the SF channels
0
Selects the full/true high-definition filter (70 MHz) for the SF channels
1
Bypasses the filters for the SF channels
(1) The logic input pins default to a logic '0' condition when left floating.
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