BQ24257 Datasheet, PDF (24/45 Pages) Texas Instruments – 2A Single Input I2C, Standalone Switch-Mode Li-Ion Battery Charger with Integrated Current Sense Resistor

bq24257
bq24258
SLUSBG0B – FEBRUARY 2013 – REVISED JULY 2013
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Input Voltage Based DPM
During normal charging process, if the input power source is not able to support the programmed or default
charging current, the supply voltage deceases. Once the supply drops to VIN_DPM, the input current limit is
reduced down to prevent the further drop of the supply. When the IC enters this mode, the charge current is
lower than the set. This feature ensures IC compatibility with adapters with different current capabilities without a
hardware change.
Sleep Mode
The bq2425x enters the low-power sleep mode if the voltage on VIN falls below sleep-mode entry threshold,
V_BAT + V_SLP, and V_IN is higher than the under-voltage lockout threshold, V_UVLO. This feature prevents draining the
battery during the absence of V_IN. When V_IN < V_BAT + V_SLP, the bq2425x turns off the PWM converter, turns on
the battery FET, sends a single 256 μs pulse is sent on the STAT and INT outputs and the FAULT/STAT bits of
the status registers are updated in the I2C. Once V_IN > V_BAT + V_SLP with the hysteresis, the FAULT bits are
cleared and the device initiates a new charge cycle.
Input Over-Voltage Protection
The bq2425x provides over-voltage protection on the input that protects downstream circuitry. The built-in input
over-voltage protection to protect the device and other components against damage from over voltage on the
input supply (Voltage from VIN to PGND). When V_IN > V_OVP, the bq2425x turns off the PWM converter, turns the
battery FET, sends a single 256 μs pulse is sent on the STAT and INT outputs and the FAULT/STAT bits of the
status registers and the battery/supply status registers are updated in the I2C. Once the OVP fault is removed,
the FAULT bits are cleared and the device returns to normal operation. The OVP threshold for the bq2425x is
programmable from 6.5 V to 10.5 V using V_OVP bits in register #7.
NTC MONITOR (contact the local TI representative for function availability)
The bq24257 includes the integration of an NTC monitor pin that complies with the JEITA specification (PSE also
available upon request). The voltage based NTC monitor allows for the use of any NTC resistor with the use of
the circuit shown below:
LDO
R₂
TS
NTC
R
3
Figure 20. Voltage Based NTC Circuit
The use of R3 is only necessary when the NTC does not have a beta near 3500K. When deviating from this
beta, error will be introduced in the actual temperature trip thresholds. The trip thresholds are summarized below
which are typical values provided in the specification table.
Table 4. Ratiometric TS Trip Thresholds for JEITA Compliant Charging
V_HOT
V_WARM
V_COOL
V_COLD
30.0%
38.3%
56.5%
60%
24
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