LMH6523 Datasheet, PDF (23/31 Pages) Texas Instruments – High Performance Quad DVGA

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LMH6523
SNOSC88 – DECEMBER 2012
SCLK
Dt_PLD
Dt_PHD
16^th clock
Dt_SUD
Dt_HD
SDI
Valid Data
Valid Data
Figure 55. Write Timing – Data Written to SDI Pin
SVA-30206510
PARAMETER
t_PL
t_PH
t_SU
t_H
Table 5. Write Timing Data Input on SDI Pin
DESCRIPTION
Minimum clock low time (clock duty dycle)
Minimum clock high time (clock duty cycle)
Input data setup time
Input data hold time
Table 6. Serial Word Format for LMH6523
C7
C6
C5
C4
C3
C2
C1
C0
1= read
0
0
0
0
000= CHA
0=write
001=CHB
010=CHC
011=CHD
100=Fast Adjust
Table 7. CH A through D Register Definition
7
6
5
4
3
2
1
0
Reserved, =0 Reserved
Reserved
Attenuation Setting:
00000 = Maximum Gain
11111 = Minimum Gain
7
6
CH D
Table 8. Fast Adjust Register Definition
5
4
CH C
3
2
CH B
1
0
CH A
CODE
00
01
10
11
Table 9. Fast Adjust Codes
ACTION
No Change
Decrease Attenuation by 1 Step (1dB)
Increase Attenuation by 1 Step (1dB)
Reserved, action undefined
THERMAL MANAGEMENT
The LMH6523 is packaged in a thermally enhanced package. The exposed pad is connected to the GND pins. It
is recommended, but not necessary, that the exposed pad be connected to the supply ground plane. In any
case, the thermal dissipation of the device is largely dependent on the attachment of this pad to the system
printed circuit board (PCB). The exposed pad should be attached to as much copper on the PCB as possible,
preferably external copper. However, it is also very important to maintain good high speed layout practices when
designing a system board. Please refer to the LMH6522 evaluation board (available separately) for suggested
layout techniques.
Copyright © 2012, Texas Instruments Incorporated
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