AM1808_1112 Datasheet, PDF (22/262 Pages) Texas Instruments – AM1808 ARM Microprocessor

AM1808
SPRS653C – FEBRUARY 2010 – REVISED DECEMBER 2011
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Table 2-7. External Memory Interface A (EMIFA) Terminal Functions (continued)
SIGNAL
NAME
EMA_A[11] / PRU1_R30[19] / GP5[11] /
PRU1_R31[19]
EMA_A[10] / PRU1_R30[18] / GP5[10] /
PRU1_R31[18]
EMA_A[9] / PRU1_R30[17] / GP5[9]
EMA_A[8] / PRU1_R30[16] / GP5[8]
EMA_A[7] / PRU1_R30[15] / GP5[7]
EMA_A[6] / GP5[6]
EMA_A[5] / GP5[5]
EMA_A[4] / GP5[4]
EMA_A[3] / GP5[3]
EMA_A[2] / GP5[2]
EMA_A[1] / GP5[1]
EMA_A[0] / GP5[0]
EMA_BA[0] / GP2[8]
EMA_BA[1] / GP2[9]
EMA_CLK / PRU0_R30[5] / GP2[7] /
PRU0_R31[5]
EMA_SDCKE / PRU0_R30[4] / GP2[6] /
PRU0_R31[4]
EMA_RAS / PRU0_R30[3] / GP2[5] /
PRU0_R31[3]
EMA_CAS / PRU0_R30[2] / GP2[4] /
PRU0_R31[2]
EMA_CS[0] / GP2[0]
EMA_CS[2] / GP3[15]
EMA_CS[3] / GP3[14]
EMA_CS[4] / GP3[13]
EMA_CS[5] / GP3[12]
EMA_A_RW / GP3[9]
EMA_WE / GP3[11]
EMA_WEN_DQM[1] / GP2[2]
EMA_WEN_DQM[0] / GP2[3]
EMA_OE / GP3[10]
EMA_WAIT[0] / PRU0_R30[0] / GP3[8] /
PRU0_R31[0]
EMA_WAIT[1] / PRU0_R30[1] / GP2[1] /
PRU0_R31[1]
TYPE ⁽¹⁾
NO.
B12
O
PULL ⁽²⁾
CP[19]
POWER
GROUP ⁽³⁾
B
DESCRIPTION
C12
O
D12
O
A13
O
B13
O
E13
O
C13
O
A14
O
D14
O
B14
O
D15
O
C14
O
C15
O
A15
O
B7
O
CP[19]
CP[19]
CP[19]
CP[20]
CP[20]
CP[20]
CP[20]
CP[20]
CP[20]
CP[20]
CP[20]
CP[16]
CP[16]
CP[16]
B
B
B
B
B
EMIFA address bus
B
B
B
B
B
B
B
EMIFA bank address
B
B
EMIFA clock
D8
O
CP[16]
B
EMIFA SDRAM clock enable
A16
O
CP[16]
B
EMIFA SDRAM row address strobe
A9
O
A18
O
B17
O
A17
O
F9
O
B16
O
D10
O
B9
O
A5
O
C8
O
B15
O
B18
I
B19
I
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
CP[16]
B
EMIFA SDRAM column address strobe
B
EMIFA SDRAM Chip Select
B
B
EMIFA Async Chip Select
B
B
B
EMIFA Async Read/Write control
B
EMIFA SDRAM write enable
B
EMIFA write enable/data mask for
EMA_D[15:8]
B
EMIFA write enable/data mask for EMA_D[7:0]
B
EMIFA output enable
B
EMIFA wait input/interrupt
B
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