LM3S9781 Datasheet, PDF (218/1155 Pages) Texas Instruments – Stellaris® LM3S9781 Microcontroller

Internal Memory
Register 10: Flash Control (FCTL), offset 0x0F8
This register is used to ensure that the microcontroller is powered down in a controlled fashion in
systems where power is cycled more frequently than once every five minutes. The USDREQ bit
should be set to indicate that power is going to be turned off. Software should poll the USDACK bit
to determine when it is acceptable to power down.
Flash Control (FCTL)
Base 0x400F.D000
Offset 0x0F8
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
USDACK USDREQ
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:2
1
0
Name
reserved
USDACK
USDREQ
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
0
User Shut Down Acknowledge
Value Description
1 The microcontroller can be powered down.
0 The microcontroller cannot yet be powered down.
This bit should be set within 50 ms of setting the USDREQ bit.
R/W
0
User Shut Down Request
Value Description
1 Requests permission to power down the microcontroller.
0 No effect.
7.6 Memory Register Descriptions (System Control Offset)
The remainder of this section lists and describes the registers that reside in Flash memory, in
numerical order by address offset. Registers in this section are relative to the System Control base
address of 0x400F.E000.
218
June 29, 2010
Texas Instruments-Advance Information