SLK2501 Datasheet, PDF (2/20 Pages) Texas Instruments – OC-48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER

SLK2501
OCĆ48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER
SLLS502A – OCTOBER 2001 – REVISED NOVEMBER 2001
block diagram
PRBSEN
SPILL
PRBS
Generator
4
2:1
MUX
4
4:1
MUX
MUX
TXDATA0..TXDATA3
TXCLKP
TXCLKN
4
4
TXPARP
TXPARN
PAR_VALID
RLOOP
TXCLKSRCP
TXCLKSRCN
REFCLKP
REFCLKN
LCKREFN
Parity
Checker
Transmit Clock
Synthesizer
MUX
Rate
Select
LOOPTIME
RSEL(0–1)
RESET
LOL
To All The Logic
Recovered
Clock
Receive Clock
Recovery
LLOOP
PRBSPASS
RXDAT0..RXDATA3
RXPARP
RXPARN
RXCLKP
TXCLKN
FRAMEN
FSYNCP
FSYNCN
Parity
Generator
PRBS
Verification
4
4
Frame
4
Sync
1:4
MUX
QD
DIV
2:1
MUX
STXDOP
STXDON
SRXDIP
SRXDIN
LOS
SIGDET
2
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