BQ24765_15 Datasheet, PDF (2/37 Pages) Texas Instruments – SMBus-Controlled Multi-Chemistry Battery Charger With Integrated Power MOSFETs

bq24765
SLUS999 – NOVEMBER 2009
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION (CONTINUED)
The bq24765 features Dynamic Power Management (DPM) and input power limiting. These features reduce
battery charge current when the input power limit is reached to avoid overloading the AC adaptor when supplying
the load and the battery charger simultaneously. A high-accuracy current sense amplifier enables accurate
measurement of input current from the AC adapter, allowing monitoring the overall system power. If the adapter
current is above the programmed low-power threshold, a signal is sent to host so that the system optimizes its
power performance according to what is available from the adapter. An integrated comparator allows monitoring
the input current through the current sense amplifier, and indicating when the input current exceeds a
programmable threshold limit. The bq24765 features a thermal regulation loop to reduce battery charge current
when the T_j limit is reached. This feature protects internal power FETs from overheating when charging with high
current.
TYPICAL APPLICATIONS
V_IN = 20 V, V_BAT = 4-cell Li-Ion, I_CHARGE = 4.5 A, Idpm = 5A
ADAPTER
+
ADAPTER -
Rc1
2
C1
2.2uF
P
P
Q1 (ACFET) Q2 (ACFET)
SI4435
SI4435
Controlled
by HOST
RAC
0.010
R1
464k
1%
R2
33.2k
1%
C2 0.1uF C3 0.1uF
DISCRETE
LOGIC
R4 R5 _RC1
10k 10k _100k
R3
10k
C4
R6 ^1uF
10k
R7
RC2
10k
20k
DCINA
QTOP
CSSN
CSSP
ACIN ^QBOT
AGND
DCINP
DCINP
DCINP
PHASE
PHASE
PHASE
PHASE
PHASE
BOOT
VDDP
VDDSMB
PGND
PGND
PGND
PGND
bq24765
ACOK
VREF
ICOUT
ICREF
CSOP
CSON
VFB
Dig I/O
HOST
CE
(EC) ^SMBus
SDA
EAO
SCL
EAI
DISCRETE
VICM
FBO
LOGIC
C5 100pF
RC6
20
C6
0.47uF
C17 C18
10uF _10uF
Q3 (BATFET)
SI4435
Controlled
by HOST
CHRG_IN
R7
5.6
C7
0.1uF
D1 BAT54
C8
1uF
L1
3.3uH
RSR
0.010
C12
10uF
C10
0.1uF
C11
10uF
C9
0.1uF
PACK +
PACK -
C13
0.1u
C14
R8
51pF _7.5k
C15
2000pF
R9
20k ^C16
130pF
R10
200k
Figure 1. Typical System Schematic, Using Internal Input Current Comparator
2
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