TLC5910 Datasheet, PDF (19/30 Pages) Texas Instruments – LED DRIVER

PRINCIPLES OF OPERATION
gray scale clock generation (continued)
MAG<0–2>
GSPOL
GSCLK
Except all low level
TLC5910
LED DRIVER
SLLS392 – NOVEMBER 1999
Except all low level
XGSOUT
PLLCLK
Same number of pulse as ratio
Same number of pulse as ratio
a) GSPOL is high
a) GSPOL is low
Figure 7. Gray Scale Clock Generation
The oscillation frequency bandwidth as referenced for PLL can be set by an external resistor connected
between RBIAS and GND. The relation between the external resistor and oscillation frequency is shown in
Table 7.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _RBIAS
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _FREQUENCY
Table 7. PLL Oscillation Frequency
22 kΩ
13 to 20 MHz
30 kΩ
8 to 14 MHz
62 kΩ
4 to 9 MHz
120 kΩ
3 to 5 MHz
To make PLL stabilization, a resistor and acapacitor connection is required between VCOIN, PDOUT, and GND.
The recommended value is shown in the following table in Figure 8.
PDOUT
VCOIN
Rpd
CVCO
Recommeded Value
CVCO
Rpd
0.1 to 1 µF 22 to 62 kΩ
Figure 8. Resistor and Capacitor Connection
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