BQ29330 Datasheet, PDF (19/26 Pages) Texas Instruments – 2-,3-,AND 4-CELL LITHIUM-ION OR LITHIUM-POLYMER BATTERY PROTECTION AFE

bq29330
www.ti.com
NAME
ADDR TYPE
STATE_ CONTROL
0x02 R/W
FUNCTION_ CONTROL 0x03 R/W
CELL _SEL
0x04 R/W
OLV
0x05 R/W
OLD
0x06 R/W
SCC
0x07 R/W
SCD
0x08 R/W
B7
0
0
CB3
0
0
SCCD3
SCDD3
B6
0
0
CB2
0
0
SCCD2
SCDD2
B5
0
0
CB1
0
0
SCCD1
SCDD1
SLUS673A – SEPTEMBER 2005 – REVISED DECEMBER 2005
BIT MAP
B4
B3
RSNS WDRST
0
TOUT
CB0
CAL1
OLV4 OLV3
0
OLD3
SCCD0 SCCV3
SCDD0 SCDV3
B2
WDDIS
BAT
CAL0
OLV2
OLD2
SCCV2
SCDV2
B1
SHIP
PACK
CELL1
OLV1
OLD1
SCCV1
SCDV1
B0
SLEEP
VMEN
CELL0
OLV0
OLD0
SCCV0
SCDV0
STATUS: Status register
STATUS REGISTER (0x00)
7
6
5
4
3
2
1
0
0
0
0
ZV
WDF
OL
SCC
SCD
The STATUS register provides information about the current state of the bq29330.
STATUS b0 (SCD): This bit indicates a short circuit in discharge condition.
0 = Voltage below the short circuit in discharge threshold (default).
1 = Voltage greater than or equal to the short circuit in discharge threshold.
STATUS b1 (SCC): This bit indicates a short circuit in charge condition in the charge direction.
0 = Voltage below the short circuit in charge threshold (default).
1 = Voltage greater than or equal to the short circuit in charge threshold.
STATUS b2 (OL): This bit indicates an overload condition.
0 = Voltage less than or equal to the overload threshold (default).
1 = Voltage greater than overload threshold.
STATUS b3 (WDF): This bit indicates a watchdog fault condition has occurred.
0 = 32-kHz oscillation is normal (default).
1 = 32-kHz oscillation stopped or not started, and the watchdog has timed out.
STATUS b4 (ZV): This bit indicates ZVCHG output is clamped.
0 = ZVCHG pin is not clamped (default).
1 = ZVCHG pin is clamped.
STATUS b5, b6, b7: Reserved
OUTPUT_CONTROL : Output control register
OUTPUT_CONTROL REGISTER (0x01)
7
6
5
4
3
2
1
0
0
PMS_CHG
GPOD
XZV
CHG
DSG
0
LTCLR
The OUTPUT_CONTROL register controls the outputs of the bq29330 and can show the state of the external pin
corresponding to the control.
OUTPUT_ CONTROL b0 (LTCLR): When a fault is latched, this bit releases the fault latch when toggled from 0
to 1 and back to 0 (default =0).
0 = (default)
0->1 ->0 clears the fault latches, allowing STATUS to be cleared on its next read.
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