AM3359_12 Datasheet, PDF (181/195 Pages) Texas Instruments – AM335x ARM® Cortex™-A8 Microprocessors (MPUs)

AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
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SPRS717B – OCTOBER 2011 – REVISED JANUARY 2012
R_SU
(0−31)
1
R_HOLD
2
R_STROBE ^(1−15)
3 ^(1−63)
CS_DELAY
(0−3)
LCD_MEMORY_CLK
(MCLK) Sync Mode
LCD_MEMORY_CLK
(CS1) Async Mode
LCD_DATA[15:0]
LCD_AC_BIAS_EN
(CS0)
LCD_VSYNC
(ALE)
19
6
6
7
14 ¹⁶
18
6
17
15
Read
Status
6
7
8
8
9
LCD_HSYNC
(WS)
LCD_PCLK
(RS)
12
12
13
A. Intel mode can be configured to perform asynchronous operations or synchronous operations. When configured in
asynchronous mode, LCD_MEMORY_CLK is not required, so it performs the CS1 function. When configured in
synchronous mode, LCD_MEMORY_CLK performs the MCLK function. LCD_MEMORY_CLK is also shown as a
reference of the internal clock that sequences the other signals.
Figure 5-71. Micro-Interface Graphic Display Intel Status
Copyright © 2011–2012, Texas Instruments Incorporated
Peripheral Information and Timings 181
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