DAC8541 Datasheet, PDF (17/21 Pages) Texas Instruments – 16-BIT SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL VOLTAGE OUTPUT

DAC8541
THEORY OF OPERATION
SLAS353 − DECEMBER 2001
analog and digital supplies
The DAC8541 utilizes two separate supplies for operation. The analog supply (AV_DD) powers the output buffer
and DAC while the digital supply (DV_DD) sets the I/O voltage thresholds. Refer to the device specification table
for additional information. AV_DD can operate from 2.7 V to 5.5 V while DV_DD can independently function from
1.8 V to 5.5 V. The control and data I/O thresholds are determined by DV_DD and are given in the electrical
characteristics section.
APPLICATION INFORMATION
host processor interfacing
DAC8541 to MSP430 microcontroller
Figure 32 shows a typical parallel interface connection between the DAC8541 and a MSP430 microcontroller.
The setup for the interface shown uses ports 4 and 5 of the MSP430 to send or receive the 16-bit data while
bits 0−7 of port 2 provides the control signals for the DAC. When data is to be transmitted to the DAC8541, the
data is made available to the DAC via P4 and P5 and P2.1 is taken low. The MSP430 then toggles P2.0 from
high-to-low and back to high, transferring the 16-bit data to the DAC. This data is loaded into the DAC register
by applying a rising edge to P2.4. The remaining five I/O signals of P2 shown in the figure control the reset,
power-down, and data format functions of the DAC. Depending on the specific requirements of a given
application, these pins may be tied to DGND or DV_DD, enabling the desired mode of operation.
MSP430F149
P4[0:7]
P5[0:7]
P2:0
P2:1
P2:2
P2:3
P2:4
P2:5
P2:6
P2:7
8 Bits
8 Bits
DAC8541
16 Bits
D[15:0]
AVDD
0.1 µF
CS
R/W
RST
RSTSEL
DVDD
0.1 µF
LDAC
PD0
PD1
VOUTSENSE
VOUT
BTC/USB
VREFL
DGND
VREFH
AGND
0.1 µF
10 µF
AVDD
10 µF
DVDD
VOUT
VREF
1 to 10 µF
(Other Connections Omitted for Clarity)
Figure 32. DAC8541 to MSP430 Microcontroller
DAC8541 to TMS320C5402 DSP
Figure 33 shows the connections between the DAC8541 and the TMS320C5402 digital signal processor. Data
is provided via the parallel data bus of the DSP while the DAC’s CS control input is derived from the decoded
I/O strobe signal. The IOSTRB in addition to the R/W and XF(I/O) signals control the data transmission to and
from the DAC as well as the LDAC control. With additional decoding, multiple DAC8541’s can be connected
to the same parallel data bus of the DSP.
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