CC2545_15 Datasheet, PDF (16/31 Pages) Texas Instruments – System-on-Chip for 2.4-GHz RF Applications

CC2545
SWRS106B – JUNE 2012 – REVISED FEBRUARY 2013
www.ti.com
BLOCK DIAGRAM
A block diagram of the CC2545 is shown in Figure 7. The modules can be roughly divided into one of three
categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related
modules. In the following subsections, a short description of each module is given. See CC2543/44/45 User's
Guide (SWRU283) for more details.
RESET_N
XOSC_Q2
XOSC_Q1
P3_7
P3_6
P3_5
P3_4
P3_3
P3_2
P3_1
P3_0
P2_7
P2_6
P2_5
P2_4
P2_3
P2_2
P2_1
P2_0
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
RESET
32-MHz
CRYSTAL OSC
32.768-kHz
CRYSTAL OSC
DEBUG
INTERFACE
WATCHDOG
TIMER
CLOCK MUX
and
CALIBRATION
HIGH-
SPEED
RC-OSC
32-kHz
RC-OSC
POWER ON RESET
BROWN OUT
ON-CHIP VOLTAGE
REGULATOR
VDD (2 V–3.6 V)
DCOUPL
SLEEP TIMER
POWER MANAGEMENT CONTROLLER
8051 CPU
CORE
DMA
PDATA
XRAM
IRAM
SFR
UNIFIED
MEMORY
ARBITRATOR
RAM
FLASH
SRAM
FLASH
IRQ CTRL
FLASH CTRL
ANALOG COMPARATOR
PSEUDO
RANDOM
NUMBER
GENERATOR
ΔΣ
ADC
AUDIO/DC
AES
ENCRYPTION
AND
DECRYPTION
FIFOCTRL
SRAM
ROM
RADIO REGISTERS
Link Layer Engine
DEMODULATOR
MODULATOR
USART 0
TIMER 1 (16-Bit)
TIMER 2
(RADIO TIMER)
RECEIVE
TRANSMIT
TIMER 3 (8-Bit)
TIMER 4 (8-Bit)
Figure 7. CC2545 Block Diagram
DIGITAL
ANALOG
MIXED
RF_P RF_N
B0301-13
16
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