AMC1204-Q1_15 Datasheet, PDF (16/33 Pages) Texas Instruments – 20 MHz, Second-Order, Isolated Delta-Sigma Modulator for Current-Shunt Measurement

AMC1204-Q1
SLAS886B – JULY 2012 – REVISED JANUARY 2013
www.ti.com
THEORY OF OPERATION
The differential analog input of the AMC1204-Q1 is implemented with a switched-capacitor circuit. This switched-
capacitor circuit implements a second-order modulator stage that digitizes the input signal into a 1-bit output
stream. The externally-provided clock source at the CLKIN pin is used by the capacitor circuit and the modulator
and should be in the range of 5 MHz to 22 MHz. The analog input signal is continuously sampled by the
modulator and compared to an internal voltage reference. A digital stream, accurately representing the analog
input voltage over time, appears at the output of the converter at the DATA pin.
ANALOG INPUT
The AMC1204-Q1 measures the differential input signal V_IN = (VINP – VINN) against the internal reference of 2.5
V using internal capacitors that are continuously charged and discharged. Figure 42 shows the simplified
schematic of the ADC input circuitry; the right side of Figure 42 illustrates the input circuitry with the capacitors
and switches replaced by an equivalent circuit.
In Figure 42, the S₁ switches close during the input sampling phase. With the S₁ switches closed, C_DIFF charges
to the voltage difference across VINP and VINN. For the discharge phase, both S₁ switches open first and then
both S₂ switches close. C_DIFF discharges approximately to AGND + 0.8 V during this phase. This two-phase
sample/discharge cycle repeats with a period of t_CLKIN = 1/f_CLKIN. f_CLKIN is the operating frequency of the
modulator. The capacitors C_IP and C_IN are of parasitic nature and caused by bonding wires and the internal ESD
protection structure.
AVDD
AGND
AGND
VINP
VINN
C_IP = 3pF
200W
S₁
S₁
200W
S₂
C_DIFF = 4pF
S₂
C_IN = 3pF
AGND + 0.8V
Equivalent
Circuit
VINP
AGND + 0.8V
VINN
3pF
R_EFF = 12.5kW
3pF
AGND AGND
R_EFF =
1
f_CLKIN ´ C_DIFF
(f_CLKIN = 20MHz)
Figure 42. Equivalent Analog Input Circuit
AGND
The input impedance becomes a consideration in designs with high input signal source impedance. This high
impedance may cause degradation in gain, linearity, and THD. The importance of this effect, however, depends
on the desired system performance. This input stage provides the mechanism to achieve low system noise, high
common-mode rejection (105 dB), and excellent power-supply rejection.
There are two restrictions on the analog input signals VINP and VINN. First, if the input voltage exceeds the
range AGND – 0.5 V to AVDD + 0.3 V, the input current must be limited to 10 mA because the input protection
diodes on the front end of the converter begin to turn on. In addition, the linearity and the noise performance of
the device are ensured only when the differential analog input voltage remains within ±250 mV.
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