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TCA6424 Datasheet, PDF (15/29 Pages) Texas Instruments – LOW-VOLTAGE 24-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS
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TCA6424
LOW-VOLTAGE 24-BIT I2C AND SMBus I/O EXPANDER
WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS
SCPS175 – NOVEMBER 2007
I2C Interface Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 10)
fscl
tsch
tscl
tsp
tsds
tsdh
ticr
ticf
tocf
tbuf
tsts
tsth
tsps
tvd(data)
tvd(ack)
I2C clock frequency
I2C clock high time
I2C clock low time
I2C spike time
I2C serial data setup time
I2C serial data hold time
I2C input rise time
I2C input fall time
I2C output fall time; 10 pF to 400 pF bus
I2C bus free time between Stop and Start
I2C Start or repeater Start condition setup time
I2C Start or repeater Start condition hold time
I2C Stop condition setup time
Valid data time; SCL low to SDA output valid
Valid data time of ACK condition; ACK signal from SCL low to SDA
(out) low
STANDARD MODE
I2C BUS
MIN
MAX
0
100
4
4.7
0
50
250
0
1000
300
300
4.7
4.7
4
4
1
1
FAST MODE
I2C BUS
MIN
MAX
0
400
0.6
1.3
0
50
100
0
20 + 0.1Cb(1)
300
20 + 0.1Cb(1)
300
20 + 0.1Cb(1)
300
1.3
0.6
0.6
0.6
1
UNIT
kHz
µs
µs
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
µs
1 µs
(1) Cb = total capacitance of one bus line in pF
Reset Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 13)
tW
tREC
tRESET
Reset pulse duration
Reset recovery time
Time to reset(1)
STANDARD MODE
I2C BUS
MIN
MAX
4
0
600
(1) Minimum time for SDA to become high or minimum time to wait before doing a START.
FAST MODE
I2C BUS
MIN
MAX
4
0
600
UNIT
ns
ns
ns
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TCA6424
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