BUF602IDBVTG4 Datasheet, PDF (15/27 Pages) Texas Instruments – High-Speed, Closed-Loop Buffer

BUF602
www.ti.com ...................................................................................................................................................... SBOS339B – OCTOBER 2005 – REVISED MAY 2008
DESIGN-IN TOOLS
DEMONSTRATION FIXTURES
Two printed circuit boards (PCBs) are available to
assist in the initial evaluation of circuit performance
using the BUF602 in its two package options. Both of
these are offered free of charge as unpopulated
PCBs, delivered with a user's guide. The summary
information for these fixtures is shown in Table 1.
Table 1. Demonstration Fixtures by Package
PRODUCT
BUF602ID
BUF602IDBV
PACKAGE
SO-8
SOT23-5
BOARD PART
NUMBER
DEM-BUF-SO-1A
DEM-BUF-SOT-1A
LITERATURE
REQUEST
NUMBER
SBAU118
SBAU117
The demonstration fixtures can be requested at the
Texas Instruments web site (www.ti.com) through the
BUF602 product folder.
MACROMODELS AND APPLICATIONS
SUPPORT
Computer simulation of circuit performance using
SPICE is often useful when analyzing the
performance of analog circuits and systems. This is
particularly true for video and RF amplifier circuits
where parasitic capacitance and inductance can have
a major effect on circuit performance. A SPICE model
for the BUF602 is available through the TI web site
(www.ti.com). These models do a good job of
predicting small-signal AC and transient performance
under a wide variety of operating conditions. They do
not do as well in predicting the harmonic distortion or
dG/dP characteristics. These models do not attempt
to distinguish between package types in their
small-signal AC performance.
OUTPUT CURRENT AND VOLTAGE
The BUF602 provides output voltage and current
capabilities that are not usually found in wideband
buffers. Under no-load conditions at +25°C, the
output voltage typically swings closer than 1.2V to
either supply rail; the +25°C swing limit is within 1.2V
of either rail. Into a 15Ω load (the minimum tested
load), it is tested to deliver more than ±60mA.
The specifications described above, though familiar in
the industry, consider voltage and current limits
separately. In many applications, it is the voltage ×
current, or V-I product, which is more relevant to
circuit operation. Refer to the Buffer Output Voltage
and Current Limitations plot (Figure 16) in the Typical
Characteristics. The X and Y axes of this graph show
the zero-voltage output current limit and the
zero-current output voltage limit, respectively. The
four quadrants give a more detailed view of the
BUF602 output drive capabilities, noting that the
graph is bounded by a Safe Operating Area of 1W
maximum internal power dissipation. Superimposing
resistor load lines onto the plot shows that the
BUF602 can drive ±3V into 25Ω or ±3.5V into 50Ω
without exceeding the output capabilities or the 1W
dissipation limit.
The minimum specified output voltage and current
over-temperature are set by worst-case simulations at
the cold temperature extreme. Only at cold startup
will the output current and voltage decrease to the
numbers shown in the Electrical Characteristic tables.
As the output transistors deliver power, the junction
temperatures will increase, decreasing both V_BE
(increasing the available output voltage swing) and
increasing the current gains (increasing the available
output current). In steady-state operation, the
available output voltage and current will always be
greater than that shown in the over-temperature
specifications, since the output stage junction
temperatures will be higher than the minimum
specified operating ambient.
For a buffer, the noise model is shown in Figure 35.
Equation 6 shows the general form for the output
noise voltage using the terms shown in Figure 35.
e_n
e_O
R_S
i_n
√4kTR_S
Figure 35. Buffer Noise Analysis Model
Ǹ _{eO +}
e²ⁿ ) ^ǒi_nR_S^Ǔ2 ) 4kTR_S
nV
Ǹ_Hz
(6)
THERMAL ANALYSIS
Due to the high output power capability of the
BUF602, heatsinking or forced airflow may be
required under extreme operating conditions.
Maximum desired junction temperature will set the
maximum allowed internal power dissipation as
described below. In no case should the maximum
junction temperature be allowed to exceed 150°C.
Operating junction temperature (T_J) is given by T_A +
P_D × θ_JA. The total internal power dissipation (P_D) is
the sum of quiescent power (P_DQ) and additional
power dissipated in the output stage (P_DL) to deliver
load power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
Copyright © 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): BUF602
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