TMS320DM647_08 Datasheet, PDF (147/167 Pages) Texas Instruments – Digital Media Processor

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HEX ADDRESS RANGE
0x02D0 31A8
0x02D0 31AC
0x02D0 31B0
0x02D0 31B4
0x02D0 31B8
0x02D0 31BC
0x02D0 31C0
0x02D0 31C4
0x02D0 31C8
0x02D0 31CC
0x02D0 31D0
0x02D0 31D4
0x02D0 31D8
0x02D0 31DC
0x02D0 31E0
0x02D0 31E4
0x02D0 31E8
0x02D0 31EC
0x02D0 31F0
0x02D0 31F4
0x02D0 31F8
0x02D0 31FC
0x02D0 3200
0x02D0 3204
0x02D0 3208
0x02D0 320C
0x02D0 3210
0x02D0 3214
0x02D0 3218
0x02D0 321C
0x02D0 3220
0x02D0 3224
0x02D0 3228
0x02D0 322C
0x02D0 3230
0x02D0 3234
0x02D0 3238
0x02D0 323C
0x02D0 3240
0x02D0 3244
0x02D0 3248
0x02D0 324C
0x02D0 3250
0x02D0 3254
0x02D0 3258
0x02D0 325C
0x02D0 3260
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372A – MAY 2007 – REVISED JUNE 2007
Table 6-64. 3-port Gigabit Switch Registers (continued)
REGISTER NAME
Rx_IntMask_Set
Rx_IntMask_Clear
DMA_IntStat_Raw
DMA_IntStat_Masked
DMA_IntMask_Set
DMA_IntMask_Clear
RX0_PendThresh
RX1_PendThresh
RX2_PendThresh
RX3_PendThresh
RX4_PendThresh
RX5_PendThresh
RX6_PendThresh
RX7_PendThresh
RX0_FreeBuffer
RX1_FreeBuffer
RX2_FreeBuffer
RX3_FreeBuffer
RX4_FreeBuffer
RX5_FreeBuffer
RX6_FreeBuffer
RX7_FreeBuffer
Tx0_HDP
Tx1_HDP
Tx2_HDP
Tx3_HDP
Tx4_HDP
Tx5_HDP
Tx6_HDP
Tx7_HDP
Rx0_HDP
Rx1_HDP
Rx2_HDP
Rx3_HDP
Rx4_HDP
Rx5_HDP
Rx6_HDP
Rx7_HDP
Tx0_CP
Tx1_CP
Tx2_CP
Tx3_CP
Tx4_CP
Tx5_CP
Tx6_CP
Tx7_CP
Rx0_CP
DESCRIPTION
CPDMA_INT Rx Interrupt Mask Set Register
CPDMA_INT Rx Interrupt Mask Clear Register
CPDMA_INT DMA Interrupt Status Register (raw value)
CPDMA_INT DMA Interrupt Status Register (masked value)
CPDMA_INT DMA Interrupt Mask Set Register
CPDMA_INT DMA Interrupt Mask Clear Register
CPDMA_INT Receive Threshold Pending Register Channel 0
CPDMA_INT Receive Threshold Pending Register Channel 1
CPDMA_INT Receive Threshold Pending Register Channel 2
CPDMA_INT Receive Threshold Pending Register Channel 3
CPDMA_INT Receive Threshold Pending Register Channel 4
CPDMA_INT Receive Threshold Pending Register Channel 5
CPDMA_INT Receive Threshold Pending Register Channel 6
CPDMA_INT Receive Threshold Pending Register Channel 7
CPDMA_INT Receive Free Buffer Register Channel 0
CPDMA_INT Receive Free Buffer Register Channel 1
CPDMA_INT Receive Free Buffer Register Channel 2
CPDMA_INT Receive Free Buffer Register Channel 3
CPDMA_INT Receive Free Buffer Register Channel 4
CPDMA_INT Receive Free Buffer Register Channel 5
CPDMA_INT Receive Free Buffer Register Channel 6
CPDMA_INT Receive Free Buffer Register Channel 7
CPDMA_STATERAM TX Channel 0 Head Desc Pointer *
CPDMA_STATERAM TX Channel 1 Head Desc Pointer *
CPDMA_STATERAM TX Channel 2 Head Desc Pointer *
CPDMA_STATERAM TX Channel 3 Head Desc Pointer *
CPDMA_STATERAM TX Channel 4 Head Desc Pointer *
CPDMA_STATERAM TX Channel 5 Head Desc Pointer *
CPDMA_STATERAM TX Channel 6 Head Desc Pointer *
CPDMA_STATERAM TX Channel 7 Head Desc Pointer *
CPDMA_STATERAM RX 0 Channel 0 Head Desc Pointer *
CPDMA_STATERAM RX 1 Channel 1 Head Desc Pointer *
CPDMA_STATERAM RX 2 Channel 2 Head Desc Pointer *
CPDMA_STATERAM RX 3 Channel 3 Head Desc Pointer *
CPDMA_STATERAM RX 4 Channel 4 Head Desc Pointer *
CPDMA_STATERAM RX 5 Channel 5 Head Desc Pointer *
CPDMA_STATERAM RX 6 Channel 6 Head Desc Pointer *
CPDMA_STATERAM RX 7 Channel 7 Head Desc Pointer *
CPDMA_STATERAM TX Channel 0 Completion Pointer Register
CPDMA_STATERAM TX Channel 1 Completion Pointer Register *
CPDMA_STATERAM TX Channel 2 Completion Pointer Register *
CPDMA_STATERAM TX Channel 3 Completion Pointer Register *
CPDMA_STATERAM TX Channel 4 Completion Pointer Register *
CPDMA_STATERAM TX Channel 5 Completion Pointer Register *
CPDMA_STATERAM TX Channel 6 Completion Pointer Register *
CPDMA_STATERAM TX Channel 7 Completion Pointer Register *
CPDMA_STATERAM RX Channel 0 Completion Pointer Register *
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Peripheral Information and Electrical Specifications 147