TMS320DM355_07 Datasheet, PDF (142/158 Pages) Texas Instruments – Digital Media System-on-Chip (DMSoC)

TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463B – SEPTEMBER 2007 – REVISED OCTOBER 2007
CLKSTP = 11b, CLKXP = 0
Table 5-39. ASP as SPI Timing Requirements
NO.
M39
M40
t_su(DRV-CKXH)
t_h(CKXH-DRV)
Setup time, DR valid before CLKX high
Hold time, DR valid after CLKX high
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MASTER
MIN
MAX
11
1
UNIT
ns
ns
Table 5-40. ASP as SPI Switching Characteristics⁽¹⁾⁽²⁾
CLKSTP = 11b, CLKXP = 0 (see Figure 5-43)
NO.
PARAMETER
MASTER
MIN
UNIT
MAX
M42
M34
M35
M36
M37
tc(CKX)
t_d(CKXL-FXH)
t_d(FXL-CKXH)
t_d(CKXL-DXV)
t_{dis(CKXL-DXHZ)}
Cycle time, CLKX
Delay time, CLKX low to FSX high⁽⁴⁾
Delay time, FSX low to CLKX high⁽⁵⁾
Delay time, CLKX low to DX valid
Disable time, DX high impedance following last data bit from
CLKX low
38.5 or
2P^{(1) (3)}
L₁ – 2
T–2
–2
–3
ns
L₁ + 3 ns
T + 2 ns
6 ns
3 ns
M38 t_d(FXL-DXV)
Delay time, FSX low to DX valid
H₁ – 2
H₁ + 10 ns
(1) P = (1/SYSCLK2), where SYSCLK2 is an output clock of PLLC1 (see Section 3.5) .
(2) T = CLKX period = (1 + CLKGDV) × 2P
L₁ = CLKX low pulse width = T/2 when CLKGDV is odd or zero and = (CLKGDV/2) × 2P when CLKGDV is even
H₁ = CLKX high pulse width = T/2 when CLKGDV is odd or zero and = (CLKGDV/2 + 1) × 2P when CLKGDV is even
(3) Use which ever value is greater.
(4) FSRP = FSXP = 1. As a SPI master, FSX is inverted to provide active-low slave-enable output.
CLKXM = FSXM = 1, CLKRM = FSRM = 0 for master ASP
(5) FSX should be low before the rising edge of clock to enable slave devices and then begin a SPI transfer at the rising edge of the master
clock (CLKX).
CLKX
FSX
DX
DR
M34
M35
M42
M37
Bit 0
Bit 0
M38
M39
Bit(n-1)
Bit(n-1)
M36
(n-2)
M40
(n-2)
(n-3)
(n-3)
Figure 5-43. ASP as SPI: CLKSTP = 11b, CLKXP = 0
(n-4)
(n-4)
142 DM355 Peripheral Information and Electrical Specifications
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