TLE2141-EP Datasheet, PDF (13/22 Pages) Texas Instruments – Excalibur™ LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIER

FUNCTIONAL DEVICE OPERATION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
the level-shifter acts simply as a buffer of gain one. The
second reason, is to bring the input signal into the proper
operating range of the output buffer. Shifting the signal up
allows the output buffer to work in its sweet spot. This also
prevents the output devices of the output buffer from going
into saturation.
Since the level-shifter needs to pass the signal without
affecting it, it really is a high-speed amplifier. The current that
biases this block comes from the bandwidth adjust section,
which allows for the power consumption to be decreased if
lower bandwidths are required. Refer to Figure 6.
OUTPUT BUFFER
The output buffer is a high-speed (800MHz open-loop
bandwidth), operational amplifier used in a non-inverting gain
of two configuration through resistive feedback. The amplifier
uses a class AB topology with a rail-to-rail output that
incorporates saturation protection as well as current-limiting.
In this way the 34830 is protected against excessive loads or
short-circuit conditions to both supply and ground and will
resume its normal operation as soon as the short-circuit or
overload condition is removed.
The output buffer also uses PTAT current biasing that
varies with R_FREQ. By increasing R_FREQ, the buffer
bandwidth can be decreased, resulting in power consumption
savings.
The output buffer has been optimized to drive a standard
video load (150Ω) with up to 5pF of load capacitance, while
meeting all of the specifications listed in the electrical
characteristics table. The output buffer can also support two
standard video loads with a slight relaxation in the
specifications.
SHUTDOWN
The 34830 features an enable input (EN) that allows the
device to be placed in a low-supply-current shutdown state
when not required to pass a video signal. Driving EN high
puts the 34830 in its active mode. Driving EN low puts the
34830 in shutdown. In shutdown, the device has a supply
current of 120nA and its output becomes high impedance.
The shutdown feature makes the 34830 ideal for portable
applications where power consumption is critical.
SETTING KEY CLAMP BIAS
For C, P_b, P_r, U, and V signals, use a resistor divider to set
the DC bias (V_CLAMP) at the input of the 34830, as shown in
Figure 23. In this configuration.
VCLAMP
=
R-----_C---1----×_{-----V----C----C-}
R_C1 + R_C2
Ensure that V_CLAMP is set to a value such that the most
negative value of the signal at the input to the 34830 is above
50mV. This prevents the internal clamp from turning on. To
maximize signal swing, set V_CLAMP = 0.5V. The general
procedure for selecting the resistor values for R_C1 and R_C2,
is to first select a value for V_CLAMP and R_C1, and then solve
for R_C2 using the formula:
Analog Integrated Circuit Device Data
Freescale Semiconductor
RC2
=
R-----C----1-----×_----(_{---V----C-----C-----–-----V----C-----L----A----M------P----})
VCLAMP
The values selected for R_C1 should not be too small, The
bias current that flows through the resistor divider network
comes directly from V_CC, and hence adds to power
consumption. A typical value for R_C1 is 10kΩ.
The general relationship between input and output voltage
of the channel is given by the formula:
VOUT = 2 × (VIN + 250mV) ± 100mV
Where the 250mV term is the offset provided by the
internal level shifter. The 100mV term that is added to the
equation represents the worst case errors and offsets that
can be expected from the signal path, due to process and
temperature variations. The DC bias at the output is given by
the same formula substituting V_CLAMP for V_IN. Thus the DC
bias at the output for V_CLAMP = 0.5V is around 1.5V.
V_CC
V_CLAMP ^RC2
IN
MC34830
AC coupling
R_C1
capacitor
Figure 23. Key Clamp DC Bias Configuration
SETTING BANDWIDTH
The bandwidth of the 34830 is set through an external
resistor connected from input R_FREQ to ground. Increasing
the value of the resistor causes the quiescent current of the
device to decrease, which in turn decreases its bandwidth.
Decreasing the value of R_FERQ has the opposite effect,
mainly to increase quiescent supply current and thus
bandwidth. Select the value of R_FREQ in the range between
9kΩ and 108kΩ. Refer to Figure 5 for a relationship between
the value of R_FREQ and the corresponding bandwidth of the
34830. To ensure that the channel bandwidth is greater than
the one needed for the application, after taking into account
process and temperature variation, multiply the value of
RFREQ obtained from the graph by 0.6. Use this number as
the value of the external resistor.
It is recommended to place a small capacitor (100pF) in
parallel with the external resistor at R_FREQ. This capacitor
helps to filter any noise or signal that couples into the R_FREQ
input, which may disturb the bias conditions of the device.
34830
13