TMS320VC5505_10 Datasheet, PDF (119/135 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320VC5505
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CPU WORD
ADDRESS
842Dh
8430h
8431h
8460h
8461h
8464h
8465h
846Ch
8500h
8501h
8504h
8505h
8508h
8509h
850Ch
850Dh
8510h
8511h
8514h
8515h
8518h
8519h
851Ch
851Dh
8520h
8521h
8524h
8525h
8528h
8529h
852Ch
852Dh
8530h
8531h
8534h
8535h
8538h
8539h
853Ch
853Dh
SPRS503B – JUNE 2009 – REVISED JANUARY 2010
Table 6-43. Universal Serial Bus (USB) Registers ⁽¹⁾ (continued)
ACRONYM
REGISTER DESCRIPTION
FIFO3R2
Transmit and Receive FIFO Register 2 for Endpoint 3
FIFO4R1
Transmit and Receive FIFO Register 1 for Endpoint 4
FIFO4R2
Transmit and Receive FIFO Register 2 for Endpoint 4
Dynamic FIFO Control Registers
-
Reserved
TXFIFOSZ_RXFIFOSZ
Transmit Endpoint FIFO Size, Receive Endpoint FIFO Size (Index register set to
select Endpoints 1-4)
TXFIFOADDR
Transmit Endpoint FIFO Address (Index register set to select Endpoints 1-4)
RXFIFOADDR
Receive Endpoint FIFO Address (Index register set to select Endpoints 1-4)
-
Reserved
Control and Status Register for Endpoint 0
-
Reserved
PERI_CSR0
Control Status Register for Peripheral Endpoint 0
-
Reserved
-
Reserved
COUNT0
Number of Received Bytes in Endpoint 0 FIFO
-
Reserved
-
Reserved
CONFIGDATA
(Upper byte of 850Dh)
Returns details of core configuration.
Control and Status Register for Endpoint 1
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
PERI_TXCSR
Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
PERI_RXCSR
Control Status Register for Peripheral Receive Endpoint (peripheral mode)
RXCOUNT
Number of Bytes in the Receiving Endpoint's FIFO
-
Reserved
-
Reserved
-
Reserved
Control and Status Register for Endpoint 2
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
PERI_TXCSR
Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
PERI_RXCSR
Control Status Register for Peripheral Receive Endpoint (peripheral mode)
RXCOUNT
Number of Bytes in Host Receive endpoint FIFO
-
Reserved
-
Reserved
-
Reserved
Control and Status Register for Endpoint 3
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
PERI_TXCSR
Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
PERI_RXCSR
Control Status Register for Peripheral Receive Endpoint (peripheral mode)
RXCOUNT
Number of Bytes in Host Receive endpoint FIFO
-
Reserved
-
Reserved
-
Reserved
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Peripheral Information and Electrical Specifications 119
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