TMS320VC5505_10 Datasheet, PDF (104/135 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320VC5505
SPRS503B – JUNE 2009 – REVISED JANUARY 2010
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6.15 Liquid Crystal Display Controller (LCDC)
The VC5505 includes a LCD Interface Display Driver (LIDD) controller.
The LIDD Controller supports the asynchronous LCD interface and has the following features:
• Provides full-timing programmability of control signals and output data
Note: Raster mode is not supported on this device.
The LCD controller is responsible for generating the correct external timing. The DMA engine provides a
constant flow of data from the frame buffer(s) to the external LCD panel via the LIDD controller. In
addition, CPU access is provided to read and write registers.
6.15.1 LCDC Peripheral Register Description(s)
Table 6-35 shows the LCDC peripheral registers.
CPU WORD
ADDRESS
2E00h
2E01h
2E04h
2E08h
2E0Ch
2E10h
2E11h
2E14h
2E18h
2E1Ch
2E1Dh
2E20h
2E24h
2E28h – 2E3Ah
2E40h
2E44h
2E45h
2E48h
2E49h
2E4Ch
2E4Dh
2E50h
2E51h
Table 6-35. LCD Controller Registers
ACRONYM
REGISTER DESCRIPTION
LCDREVMIN
LCDREVMAJ
LCDCR
LCDSR
LCDLIDDCR
LCDLIDDCS0CONFIG0
LCDLIDDCS0CONFIG1
LCDLIDDCS0ADDR
LCDLIDDCS0DATA
LCDLIDDCS1CONFIG0
LCDLIDDCS1CONFIG1
LCDLIDDCS1ADDR
LCDLIDDCS1DATA
—
LCDDMACR
LCDDMAFB0BAR0
LCDDMAFB0BAR1
LCDDMAFB0CAR0
LCDDMAFB0CAR1
LCDDMAFB1BAR0
LCDDMAFB1BAR1
LCDDMAFB1CAR0
LCDDMAFB1CAR1
LCD Minor Revision Register
LCD Major Revision Register
LCD Control Register
LCD Status Register
LCD LIDD Control Register
LCD LIDD CS0 Configuration Register 0
LCD LIDD CS0 Configuration Register 1
LCD LIDD CS0 Address Read/Write Register
LCD LIDD CS0 Data Read/Write Register
LCD LIDD CS1 Configuration Register 0
LCD LIDD CS1 Configuration Register 1
LCD LIDD CS1 Address Read/Write Register
LCD LIDD CS1 Data Read/Write Register
Reserved
LCD DMA Control Register
LCD DMA Frame Buffer 0 Base Address Register 0
LCD DMA Frame Buffer 0 Base Address Register 1
LCD DMA Frame Buffer 0 Ceiling Address Register 0
LCD DMA Frame Buffer 0 Ceiling Address Register 1
LCD DMA Frame Buffer 1 Base Address Register 0
LCD DMA Frame Buffer 1 Base Address Register 1
LCD DMA Frame Buffer 1 Ceiling Address Register 0
LCD DMA Frame Buffer 1 Ceiling Address Register 1
104 Peripheral Information and Electrical Specifications
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