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LM4F232H5QCFIG Datasheet, PDF (1147/1472 Pages) Texas Instruments – Stellaris® LM4F232H5QC Microcontroller
Stellaris® LM4F232H5QC Microcontroller
Register 5: USB Transmit Interrupt Enable (USBTXIE), offset 0x006
USBTXIE is a 16-bit register that provides interrupt enable bits for the interrupts in the USBTXIS
OTG A / register. When a bit is set, the USB interrupt is asserted to the interrupt controller when the
Host
corresponding interrupt bit in the USBTXIS register is set. When a bit is cleared, the interrupt in the
USBTXIS register is still set but the USB interrupt to the interrupt controller is not asserted. On reset,
all interrupts are enabled.
OTG B /
Device
USB Transmit Interrupt Enable (USBTXIE)
Base 0x4005.0000
Offset 0x006
Type R/W, reset 0xFFFF
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
EP7
EP6
EP5
EP4
EP3
EP2
EP1
EP0
Type RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit/Field
15:8
7
Name
reserved
EP7
Type
RO
R/W
Reset
0
1
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
TX Endpoint 7 Interrupt Enable
Value Description
1 An interrupt is sent to the interrupt controller when the EP7 bit
in the USBTXIS register is set.
0 The EP7 transmit interrupt is suppressed and not sent to the
interrupt controller.
6
EP6
R/W
1
TX Endpoint 6 Interrupt Enable
Same description as EP7.
5
EP5
R/W
1
TX Endpoint 5 Interrupt Enable
Same description as EP7.
4
EP4
R/W
1
TX Endpoint 4 Interrupt Enable
Same description as EP7.
3
EP3
R/W
1
TX Endpoint 3 Interrupt Enable
Same description as EP7.
2
EP2
R/W
1
TX Endpoint 2 Interrupt Enable
Same description as EP7.
1
EP1
R/W
1
TX Endpoint 1 Interrupt Enable
Same description as EP7.
November 08, 2011
Texas Instruments-Advance Information
1147