TLC8188 Datasheet, PDF (11/12 Pages) Texas Instruments – 10-BIT, 4 MSPS, CIS/LINEAR CCD SENSOR PROCESSOR

TLC8188
10-BIT, 4 MSPS, CIS/LINEAR CCD SENSOR PROCESSOR
SLAS177A – DECEMBER 1997 – REVISED SEPTEMBER 1998
PRINCIPLES OF OPERATION
DAC value registers and DAC sign register format
DSIGN = 0:
DAC coding
0000 0000
1000 0000
1111 1111
CIS mode DAC output
0 V (default)
1.25 V
2.5 V
CCD mode DAC output
0 V (default)
250 mV
500 mV
DSIGN = 1:
DAC coding
0000 0000
1000 0000
1111 1111
CIS mode DAC output
Not applicable
CCD mode DAC output
0 V (default)
–250 mV
–500 mV
PGA output in CCD mode: V_O(PGA) = Gain (Vr – Vs) – V_offset
Offset correction performed after gain stage.
PGA output in CIS single-ended mode: V_O(PGA) = Gain (Vs – V_offset)
Offset correction performed before gain stage.
PGA output in CIS differential input mode: V_O(PGA) = Gain (Signal on RIN – Signal on GIN)
No additional offset cancellation.
gain registers format
PGA coding
000000
111111
PGA gain
1 V/V (default)
5 V/V
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