ADS5287 Datasheet, PDF (10/31 Pages) Texas Instruments – 10-Bit, Octal-Channel ADC Up to 65MSPS

ADS5287
SBAS428 – JANUARY 2008
www.ti.com
Analog Input
Clock Input
LCLK_N
6X ADCLK
LCLK_P
OUT_P
SERIAL DATA
OUT_N
ADCLK_N
1X ADCLK
ADCLK_P
Sample n
t_D(A)
LVDS TIMING DIAGRAM
Sample n + 12
Sample n + 13
12 clocks latency
t_SAMPLE
0 0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 0 0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 0 0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9
t_PROP
DEFINITION OF SETUP AND HOLD TIMES
LCLK_N
LCLK_P
OUT_N
OUT_P
t_H1
t_SU1 t_H2
t_SU2
t_SU = min(t_SU1, t_SU2)
t_H = min(t_H1, t_H2)
TIMING CHARACTERISTICS⁽¹⁾
PARAMETER
TEST CONDITIONS
MIN
t_A
Aperture delay
1.5
Aperture delay variation Channel-to-channel within the same device (3σ)
t_J
Aperture jitter
Time to valid data after coming out of
COMPLETE POWER-DOWN mode
t_WAKE
Wake-up time
Time to valid data after coming out of PARTIAL
POWER-DOWN mode (with clock continuing to
run during power-down)
Time to valid data after stopping and restarting
the input clock
Data latency
(1) Timing parameters are ensured by design and characterization; not production tested.
ADS5287
TYP
±20
400
50
2
40
12
MAX
4.5
UNIT
ns
ps
fs
µs
µs
µs
Clock
cycles
10
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