TMS320C6745 Datasheet, PDF (1/209 Pages) Texas Instruments – Floating-point Digital Signal Processor

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TMS320C6745/6747 Floating-point Digital Signal Processor
SPRS377A – SEPTEMBER 2008 – REVISED OCTOBER 2008
1 TMS320C6745/6747 Floating-point Digital Signal Processor
1.1 Features
• Applications
– Industrial Control
– USB, Networking
– High-Speed Encoding
– Professional Audio
• Software Support
– TI DSP/BIOS™
– Chip Support Library and DSP Library
• 300-MHz C674x™ VLIW DSP
• C674x Instruction Set Features
– Superset of the C67x+™ and C64x+™ ISAs
– 2400/1800 C674x MIPS/MFLOPS
– Byte-Addressable (8-/16-/32-/64-Bit Data)
– 8-Bit Overflow Protection
– Bit-Field Extract, Set, Clear
– Normalization, Saturation, Bit-Counting
– Compact 16-Bit Instructions
• C674x Two Level Cache Memory Architecture
– 32K-Byte L1P Program RAM/Cache
– 32K-Byte L1D Data RAM/Cache
– 256K-Byte L2 Unified Mapped RAM/Cache
– Flexible RAM/Cache Partition (L1 and L2)
– 1024K-Byte L2 ROM
• Enhanced Direct-Memory-Access Controller 3
(EDMA3):
– 2 Transfer Controllers
– 32 Independent DMA Channels
– 8 Quick DMA Channels
– Programmable Transfer Burst Size
• TMS320C674x™ Floating Point VLIW DSP Core
– Load-Store Architecture With Non-Aligned
Support
– 64 General-Purpose Registers (32 Bit)
– Six ALU (32-/40-Bit) Functional Units
• Supports 32-Bit Integer, SP (IEEE Single
Precision/32-Bit) and DP (IEEE Double
Precision/64-Bit) Floating Point
• Supports up to Four SP Additions Per
Clock, Four DP Additions Every 2
Clocks
• Supports up to Two Floating Point (SP
or DP) Approximate Reciprocal or
Square Root Operations Per Cycle
– Two Multiply Functional Units
• Mixed-Precision IEEE Floating Point
Multiply Supported up to:
– 2 SP x SP -> SP Per Clock
– 2 SP x SP -> DP Every Two Clocks
– 2 SP x DP -> DP Every Three Clocks
– 2 DP x DP -> DP Every Four Clocks
• Fixed Point Multiply Supports Two 32 x
32-Bit Multiplies, Four 16 x 16-Bit
Multiplies, or Eight 8 x 8-Bit Multiplies
per Clock Cycle, and Complex Multiples
– Instruction Packing Reduces Code Size
– All Instructions Conditional
– Hardware Support for Modulo Loop
Operation
– Protected Mode Operation
– Exceptions Support for Error Detection and
Program Redirection
• 128K-Byte RAM Shared Memory
• Two External Memory Interfaces:
– EMIFA
• NOR (8-/16-Bit-Wide Data)
• NAND (8-/16-Bit-Wide Data)
• 16-Bit SDRAM With 128MB Address
Space
– EMIFB
• 32-Bit or 16-Bit SDRAM With 256MB
Address Space
• Three Configurable 16550 type UART Modules:
– UART0 With Modem Control Signals
– 16-byte FIFO
– 16x or 13x Oversampling Option
• LCD Controller
• Two Serial Peripheral Interfaces (SPI) Each
With One Chip-Select
• Multimedia Card (MMC)/Secure Digital (SD)
Card Interface with Secure Data I/O (SDIO)
• Two Master/Slave Inter-Integrated Circuit (I²C
Bus™)
• USB 1.1 OHCI (Host) With Integrated PHY
(USB1)
• USB 2.0 OTG Port With Integrated PHY (USB0)
– USB 2.0 High-/Full-Speed Client
– USB 2.0 High-/Full-/Low-Speed Host
– End Point 0 (Control)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this document.
C674x, TMS320C6000, C6000 are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2008–2008, Texas Instruments Incorporated