TLC3544 Datasheet, PDF (1/40 Pages) Texas Instruments – 5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS

TLC3544, TLC3548
5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL
ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
SLAS266C – OCTOBER 2000 – REVISED MAY 2003
D 14-Bit Resolution
D Maximum Throughput 200 KSPS
D Analog Input Range 0-V to Reference
Voltage
D Multiple Analog Inputs:
– 8 Channels for TLC3548
– 4 Channels for TLC3544
D Pseudodifferential Analog Inputs
D SPI/DSP-Compatible Serial Interfaces With
SCLK up to 25 MHz
D Single 5-V Analog Supply; 3-/5-V Digital
Supply
D Low Power:
– 4 mA (Internal Reference: 1.8 mA) for
Normal Operation
– 20 µA in Autopower-Down
D Built-In 4-V Reference, Conversion Clock
and 8x FIFO
D Hardware-Controlled and Programmable
Sampling Period
D Programmable Autochannel Sweep and
Repeat
D Hardware Default Configuration
D INL: ±1 LSB Max
D DNL: ±1 LSB Max
D SINAD: 80.8 dB
D THD: –95 dB
SCLK
FS
SDI
EOC/INT
SDO
DGND
DV_DD
CS
A0
A1
A2
A3
TLC3548
DW OR PW PACKAGE
(TOP VIEW)
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
CSTART
AV_DD
AGND
BGAP
REFM
REFP
AGND
AV_DD
A7
A6
A5
A4
SCLK
FS
SDI
EOC/INT
SDO
DGND
DV_DD
CS
A0
A1
TLC3544
DW OR PW PACKAGE
(TOP VIEW)
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
CSTART
AV_DD
AGND
BGAP
REFM
REFP
AGND
AV_DD
A3
A2
description
The TLC3544 and TLC3548 are a family of 14-bit resolution high-performance, low-power, CMOS
analog-to-digital converters (ADC). All devices operate from a single 5-V analog power supply and 3-V to 5-V
digital supply. The serial interface consists of four digital inputs [chip select (CS), frame sync (FS), serial
input-output clock (SCLK), serial data input (SDI)], and a 3-state serial data output (SDO). CS (works as SS,
slave select), SDI, SDO, and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form a DSP interface. The
frame sync signal (FS) indicates the start of a serial data frame being transferred. When multiple converters
connect to one serial port of a DSP, CS works as the chip select to allow the host DSP to access the individual
converter. CS can be tied to ground if only one converter is used. FS must be tied to DV_DD if it is not used (such
as in an SPI interface). When SDI is tied to DV_DD, the device is set in hardware default mode after power-on,
and no software configuration is required. In the simplest case, only three wires (SDO, SCLK, and CS or FS)
are needed to interface with the host.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2000 – 2003, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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