BQ4852Y Datasheet, PDF (1/16 Pages) Texas Instruments – RTC Module With 512Kx8 NVSRAM

bq4852Y
RTC Module With 512Kx8 NVSRAM
Features
® Integrated SRAM, real-time
clock, CPU supervisor, crystal,
power-fail control circuit, and
battery
® Real-Time Clock counts hun-
dredths of seconds through years
in BCD format
® RAM-like clock access
® Compatible with industry-
standard 512K x 8 SRAMs
® Unlimited write cycles
® 10-year minimum data retention
and clock operation in the ab-
sence of power
® Automatic power-fail chip dese-
lect and write-protection
® Watchdog timer, power-on reset,
alarm/periodic interrupt, power-
fail and battery-low warning
® Software clock calibration for
greater than ±1 minute per
month accuracy
General Description
The bq4852Y RTC Module is a non-
volatile 4,194,304-bit SRAM organ-
ized as 524,288 words by 8 bits with
an integral accessible real-time
clock and CPU supervisor. The CPU
supervisor provides a programmable
watchdog timer and a microproces-
sor reset. Other features include
alarm, power-fail, and periodic inter-
rupts, and a battery-low warning.
The device combines an internal lith-
ium battery, quartz crystal, clock and
power-fail chip, and a full CMOS
SRAM in a plastic 36-pin DIP mod-
ule. The RTC Module directly re-
places industry-standard SRAMs and
also fits into many EPROM and EE-
PROM sockets without any require-
ment for special write timing or limi-
tations on the number of write cycles.
Registers for the real-time clock,
alarm and other special functions
are located in registers 7FFF0h–
7FFFFh of the memory array.
The clock and alarm registers are
dual-port read/write SRAM loca-
tions that are updated once per sec-
ond by a clock control circuit from
the internal clock counters. The
dual-port registers allow clock up-
dates to occur without interrupting
normal access to the rest of the
SRAM array.
The bq4852Y also contains a power-
fail-detect circuit. The circuit dese-
lects the device whenever VCC falls
below tolerance, providing a high de-
gree of data security. The battery is
electrically isolated when shipped
from the factory to provide maxi-
mum battery capacity. The battery
remains disconnected until the first
application of VCC.
Pin Connections
Aug. 1996
RST 1
NC 2
A18 3
A16 4
A14 5
A12 6
A7 7
A6 8
A5 9
A4 10
A3 11
A2 12
A1 13
A0 14
DQ0 15
DQ1 16
DQ2 17
VSS 18
36 VCC
35 NC
34 INT
33 A15
32 ^A17
31 WE
30 ^A13
29 ^A8
28 ^A9
27 ^A11
26 OE
25 ^A10
24 CE
23 DQ7
22 DQ6
21 DQ5
20 DQ4
19 DQ3
36-Pin DIP Module
PN485201.eps
Pin Names
A0–A18 Address input
CE
Chip enable
RST
Microprocessor reset
WE
Write enable
OE
Output enable
DQ0–DQ7 Data in/data out
INT
Programmable interrupt
VCC
+5 volts
VSS
Ground
1