ADS5263_13 Datasheet, PDF (1/82 Pages) Texas Instruments – Quad Channel 16-Bit, 100-MSPS High-SNR ADC

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ADS5263
SLAS760C – MAY 2011 – REVISED JANUARY 2013
Quad Channel 16-Bit, 100-MSPS High-SNR ADC
Check for Samples: ADS5263
FEATURES
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• Maximum Sample Rate: 100 MSPS
• Programmable Device Resolution
– Quad-Channel, 16-Bit, High-SNR Mode
– Quad-Channel, 14-Bit, Low-Power Mode
• 16-Bit High-SNR Mode
– 1.4 W Total Power at 100 MSPS
– 355 mW / Channel
– 4 Vpp Full-scale Input
– 85-dBFS SNR at f_in = 3 MHz, 100 MSPS
• 14-Bit Low-Power Mode
– 785 mW Total Power at 100 MSPS
– 195 mW/Channel
– 2-Vpp Full-Scale Input
– 74-dBFS SNR at f_in = 10 MHz
– Integrated Clamp (for interfacing to CCD
sensors)
• Low-Frequency Noise Suppression
• Digital Processing Block
– Programmable FIR Decimation Filters
– Programmable Digital Gain: 0 dB to 12 dB
– 2- or 4-Channel Averaging
• Programmable Mapping Between ADC Input
Channels and LVDS Output Pins—Eases
Board Design
• Variety of Test Patterns to Verify Data Capture
by FPGA/Receiver
• Serialized LVDS Outputs
• Internal and External References
• 3.3-V Analog Supply
• 1.8-V Digital Supply
• Recovers From 6-dB Overload Within 1 Clock
Cycle
• Package:
– 9-mm × 9-mm 64-Pin QFN
– Non-magnetic package option for MRI
systems
• CMOS Technology
APPLICATIONS
• Medical Imaging – MRI
• Spectroscopy
• CCD Imaging
DESCRIPTION
Using CMOS process technology and innovative
circuit techniques, the ADS5263 is designed to
operate at low power and give very high SNR
performance with a 4-Vpp full-scale input. Using a
low-noise 16-bit front-end stage followed by a 14-bit
ADC, the device gives 85-dBFS SNR up to 10 MHz
and better than 80-dBFS SNR up to 30 MHz.
The device also has a 14-bit low power mode, where
it operates as a quad-channel 14-bit ADC. The 16-bit
front-end stage is powered down and the part
consumes almost half the power, compared to the
16-bit mode. The 14-bit mode supports a 2-Vpp full-
scale input signal, with typical 74-dBFS SNR. The
ADS5263 can be dynamically switched between the
two resolution modes. This allows systems to use the
same part in a high-resolution, high-power mode or a
low-resolution, low-power mode.
The ADS5263 has a digital processing block that
integrates several commonly used digital functions,
such as digital gain (up to 12 dB). It includes a digital
filter module that has built-in decimation filters (with
low-pass, high-pass and band-pass characteristics).
The decimation rate is also programmable (by 2, by
4, or by 8). This makes it very useful for narrow-band
applications, where the filters can be used to improve
SNR and knock-off harmonics, while at the same time
reducing the output data rate.
The device includes an averaging mode where two
channels (or even four channels) can be averaged to
improve SNR. A very unique feature is the
programmable mapper module that allows flexible
mapping between the input channels and the LVDS
output pins. This helps to greatly reduce the
complexity of LVDS output routing and can potentially
result in cheaper system boards by reducing the
number of PCB layers.
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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