THC63LVD824 Datasheet, PDF (8/15 Pages) THine Electronics, Inc. – Single(135MHz)/Dual(170MHz) Link LVDS Receiver for XGA/SXGA/SXGA+/UXGA

THC63LVD824 _Rev2.0
AC Timing Diagrams
TTL Outputs
CLKOUT
2.0V
t_RCP
Rxn
Gxn
Bxn
x = 1,2
n = 0~7
Phase Lock Loop Set Time
3.0V
VCC
RCLKx+/-
/PDWN
CLKOUT
t_RCH
t_RCL
2.0V 2.0V
0.8V 0.8V
t_RH
t_RS
2.0V 2.0V
0.8V 0.8V
R/F = L
R/F = H
2.0V
t_RPLL
2.0V
Copyright 2000-2003 THine Electronics, Inc. All rights reserved
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THine Electronics, Inc.