THC63LVD824 Datasheet, PDF (11/15 Pages) THine Electronics, Inc. – Single(135MHz)/Dual(170MHz) Link LVDS Receiver for XGA/SXGA/SXGA+/UXGA

THC63LVD824 _Rev2.0
AC Timing Diagrams
LVDS Inputs
t_RIP2
t_RIP3
t_RIP4
t_RIP5
t_RIP6
t_RIP0
t_RIP1
Ryx+/-
Ryx6 Ryx5 Ryx4 Ryx3 Ryx2 Ryx1 Ryx0 Ryx6 Ryx5 Ryx4 Ryx3 Ryx2 Ryx1
RCLKx+
x = 1,2
y = A,B,C,D
V_diff = 0V
t_RCIP
V_diff = 0V
RCLK1+
RCLK2+
t_CK12
V_diff = 0V
V_diff = 0V
Note:
V_diff = (Ryx+) - (Ryx-), (RCLKx+) - (RCLKx-)
Copyright 2000-2003 THine Electronics, Inc. All rights reserved
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THine Electronics, Inc.