THC63LVD824 Datasheet, PDF (12/15 Pages) THine Electronics, Inc. – Single(135MHz)/Dual(170MHz) Link LVDS Receiver for XGA/SXGA/SXGA+/UXGA

THC63LVD824 _Rev2.0
LVDS Data Inputs Timing Diagrams in Single Link
Previous Cycle
(2nd pixel data)
Current Cycle
(1st pixel data)
RCLK1+
RA1+/-
R26’ R25’ R24’ R23’ R22’ G12 R17 R16 R15 R14 R13 R12 G22’’
RB1+/-
G27’ G26’ G25’ G24’ G23’ B13 B12 G17 G16 G15 G14 G13 B23’’
RC1+/-
HSYNC’ B27’ B26’ B25’ B24’ DE VSYNC HSYNC B17 B16 B15 B14 DE’’
RD1+/-
B20’ G21’ G20’ R21’ R20’ x B11 B10 G11 G10 R11 R10 x’’
Copyright 2000-2003 THine Electronics, Inc. All rights reserved
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THine Electronics, Inc.