TSC80251A1 Datasheet, PDF (99/166 Pages) TEMIC Semiconductors – Extended 8-bit Microcontroller with Analog Interfaces

TSC 80251A1
No new acquisition can begin while ADCS bit is set (i.e. a conversion is in progress) and this bit
cannot be reset by software. When a new result is ready in the 8–bit ADC Data register (ADAT), when
the conversion is completed, the ADC Interrupt bit (ADCI) is set and an ADC interrupt request is
sent to the Interrupt System (see “Interrupt System” chapter). This bit must be reset by software when
the contents of ADAT register can be disposed of (i.e. after it has been read by the interrupt service
routine). Then a new acquisition can be requested (i.e. ADCS bit cannot be set while ADCI bit is set).
ADCI bit and ADAT register are preserved in Idle mode and in Power–Down mode (see “Power
Monitoring and Management”chapter), hence an already completed conversion is not lost. A
conversion in progress will be aborted when entering the Idle mode, while it may not be aborted when
entering in Power–Down mode. Therefore, it is recommended to wait for ADCS bit is zero before
going into this mode, otherwise ADCI bit and ADAT register may change and a false interrupt may
occur when this mode is exited through an interrupt. After an hardware reset, ADCON is set to its
default value and the Analog to Digital Converter is inactive.
II. 7.2
Rev. B (20/09/96)