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U6083B Datasheet, PDF (5/8 Pages) TEMIC Semiconductors – PWM Power Control with Interference Suppression
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U6083B
Parameters
Test Conditions / Pins
Battery overvoltage detection
Stage 1:
– on
– off
Symbol
VBatt
Stage 2:
Detection stage 2
Stabilized voltage
Short-circuit protection
Short-circuit current
limitation
Short-circuit detection
– on
– off
IS = 30 mA
VT1 = VS – V6
VT2 = VS – V6
Pin 1
Pin 6
Delay timer short circuit detection, VBatt = 12 V Pin 5
Switched off threshold
VT5 = VS – V5
Charge current
Discharge current
Capacitance current
Voltage doubler
I5 = Ich – Idis
Pin 7
Voltage
Duty cycle 100%
Oscillator frequency
Internal voltage limitation
Edge steepness
Gate output
I7 = 5 mA
(whichever is lower)
a dv8/dt = 4 dV4/dt
dV8/dtmax
Pin 8
Voltage
Low level
W VBatt = 16.5 V
Tamb = 110°C, R3 = 150
High level,
duty cycle 100%
Current
Duty cycle
Oscillator
V8 = Low level
V8 = High level, I7 > | I8 |
v Min: C2 = 68 nF
Max: VBatt 12.4 V
VBatt = 16.5 V, C2 = 68 nF
Frequency
Pin4
Threshold cycle
Upper
Lower
Oscillator current
Frequency
+ a + V8
High, 1
VT100
VS
+ a + V8
Low, 2
t VT 100
VS
a + VTL
3
VS
VBatt = 12 V
C4 open, C2 = 68 nF
duty cycle = 50%
VBatt
Vs
VT1
VT2
VT1 – VT2
VT5
Ich
Idis
I5
V7
f7
V7
a4
V8
V8
I8
tp/T
f
a1
a2
a3
Iosc
f
*) Reference point is battery ground.
Min.
18.3
16.7
25.5
19.5
18.5
85
75
3
10.2
5
2 VS
280
26
VS+14
53
0.35
1.0
–1.0
15
100
65
10
0.68
0.65
0.26
34
56
Typ.
20.0
18.5
28.5
23.0
20.0
100
90
10
10.4
13
3
10
400
27.5
VS+15
63
0.70
V7
18
73
0.7
0.67
0.28
45
75
Max.
21.7
20.3
32.5
26.5
21.5
120
105
30
10.6
15
520
30.0
VS+16
72
130
0.95
1.5 *)
21
81
2000
0.72
0.69
0.3
54
90
Unit
V
V
V
mV
mV
V
mA
mA
mA
kHz
V
V/ms
V
mA
%
Hz
mA
Hz
TELEFUNKEN Semiconductors
5 (8)
Rev. A1, 14-Feb-97
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