U6083B Datasheet, PDF (3/8 Pages) TEMIC Semiconductors – PWM Power Control with Interference Suppression

U6083B
W V_T100 = (12 V – 4 mA 150 )
V_T<100 = 11.4 V 0.67 = 7.6 V
V_TL = 11.4 V 0.28 = 3.2 V
[ 0.7 8 V
Oscillator Frequency
3 cases have to be distinguished
1) f₁ for duty cycle = 100%, no slope reduction with
capacitor C₄ (see figure 3)
+f_{1 2}
*^Iosc
(V_T100 V_TL)
+ + f₁ ... 75 Hz
+ ⁺m ^C2
,
whereas C₂
I_osc 45
68 nF
A
2) f₂ for duty cycle < 100%, no slope reduction with
capacitor C₄
For a duty cycle of less than 100%, the oscillator
frequency, f, is as follows:
+ _{ǒ * Ǔ} f₂
2
I_osc
t ^VT 100 ^VTL
+ + f₂ ... 69Hz
++ _{m C2}
,
whereas C₂
I_osc
68 nF
45 A
3) f₃ with duty cycle < 100% with slope reduction
capacitor C₄ (see page 3 “Output Slope Control”)
+f_{3 2}
* ) _t (V_{T 100}
I_osc
V_TL) C₂
2V_Batt
C₄
+ whereas C₂ 68 nF
+ C₄ 1.8 nF
+ m I_osc 45 A
+ + f₃ ... 70 Hz
By selecting different values of C₂ and C₄, it is possible
to have a range of oscillator frequency, f, from 10 to
2000 Hz as shown in the data sheet.
Output Slope Control
The slope of the lamp voltage is internally limited to
reduce radio interference, by limitation of the voltage
gain of the PWM comparator.
Thus the voltage rise on the lamp is proportional to the
oscillator voltage increase at the switchover time accord-
ing to the equation.
a dV₈/dt = ₄ dV₄/dt =
a a a 2 ₄ f ( ₂ – ₃) (V_Batt – I_S R₃)
when
a f = 75 Hz, V_TX = V_{T < 100} and ₄ = 63
we obtain
W dV₈/dt=2 63 75 Hz (0.67–0.28) (12 V–4 mA 15 )
= 42 V/ms
Via an external capacitor, C₄, the slope can be further
reduced as follows:
a dV₈/dt = I_OSC/(C₄ + C₂/ ₄)
when
m a I_OSC = 45 A, C₄ = 1.8 nF, C₂ = 68 nF and ₄ = 63
m then dV₈/dt = 45 A/(1.8 nF + 68 nF/63) = 15.6 V/ms
W To damp oscillation tendencies, a resistance of 100 in
series with capacitance C₄ is recommended.
Interference Suppression
“On board” radio reception according to VDE 0879 part
3/4.81
Test conditions refering to figure 2.
Application circuit according to figure 1 or 3.
Load: nine 4-W lamps in parallel.
Duty cycle
V_Batt
f_Osc
= 18%
= 12 V
= 100 Hz
Figure 2. Voltage spectrum of on-board radio reception
Pins 5 and 6, Short-Circuit Protection and
Current Sensing,
1. Short-Circuit Detection and Time Delay, t_d
The lamp current is monitored by means of an external
 ^{shunt resistor. If the lamp current exceeds the threshold}
for the short-circuit detection circuit (V_T2 90 mV), the
duty cycle is switched over to 100% and the capacitor C₅
is charged by a current source of I_ch – I_dis. The external
FET is switched off after the cut-off threshold (V_T5) is
reached. Renewed switching on of the FET is possible
only after a power-on reset. The current source, I_dis,
ensures that the capacitor C₅ is not charged by parasitic
currents.
TELEFUNKEN Semiconductors
3 (8)
Rev. A1, 14-Feb-97