U6083B Datasheet, PDF (4/8 Pages) TEMIC Semiconductors – PWM Power Control with Interference Suppression

U6083B
Time delay, t_d, is as follows:
t_d = C₅ V_T5/ (I_ch – I_dis)
With C₅ = 100 nF and V_T5 = 10.4 V, I_ch =13 mA,
I_dis = 3 mA, we have
t_d = 100 nF 10.4 V/ (13 mA – 3 mA)
t_d = 104 ms
2. Current Limitation:
The lamp current is limited by a control amplifier to
protect the external power transistor. The voltage drop
across an external shunt resistor acts as the measured
variable. Current limitation takes place for a voltage drop
 of V_T1 100 mV. Owing to the difference
 V_T1–V_T2 10 mV, it is ensured that current limitation
occurs only when the short-circuit detection circuit has
responded.
After a power-on reset, the output is inactive for half an
oscillator cycle. During this time, the supply voltage
capacitor can be charged so that current limitation is guar-
anteed in the event of a short-circuit when the IC is
switched on for the first time.
Pins 7 and 8, Charge Pump and Output,
Output, Pin 8, is suitable for controlling a power
MOSFET. During the active integration phase, the supply
current of the operational amplifier is mainly supplied by
the capacitor C₃ (bootstrapping). In addition, a trickle
 ^{charge is generated by an integrated oscillator}
(f₇ 400 kHz) and a voltage doubler circuit. This
permits a gate voltage supply at a duty cycle of 100%.
Absolute Maximum Ratings
Parameters
Junction temperature
Ambient temperature range
Storage temperature range
Thermal Resistance
Junction ambient
Parameters
Symbol
T_j
T_amb
T_stg
Value
150
–40 to +110
–55 to +125
Symbol
R_thJA
Value
120
Unit
°C
°C
°C
Unit
K/W
Electrical Characteristics
T_amb = –40 to +110°C, V_Batt = 9 to 16.5 V, (basic function is guaranteed between 6.0 V to 9.0 V) reference point ground,
unless otherwise specified (see figure 1). All other values refer to Pin GND (Pin 2).
Parameters
Current consumption
Supply voltage
Stabilized voltage
Battery undervoltage
detection
Test Conditions / Pins Symbol Min.
Typ.
Max. Unit
Pin 1
Overvoltage detection,
stage 1
I_S
V_Batt
7.9
mA
25
V
I_S = 10 mA
– on
– off
Pin 1
V_s
24.5
27.0
V
V_Batt
4.4
5.0
5.6
V
4.8
5.4
6.0
4 (8)
TELEFUNKEN Semiconductors
Rev. A1, 14-Feb-97