SI9945DY Datasheet, PDF (2/4 Pages) Fairchild Semiconductor – Dual N-Channel Enhancement Mode MOSFET

Si9945DY
Specifications (T_J = 25_C Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current^b
Drain-Source On-State Resistance^b
Forward Transconductance^b
Diode Forward Voltage^b
Dynamic^a
V_GS(th)
I_GSS
I_DSS
I_D(on)
r_DS(on)
g_fs
V_SD
V_DS = V_GS, I_D = 250 mA
V_DS = 0 V, V_GS = "20 V
V_DS = 48 V, V_GS = 0 V
V_DS = 48 V, V_GS = 0 V, T_J = 55_C
V_DS w 5 V, V_GS = 10 V
V_GS = 10 V, I_D = 3.3 A
V_GS = 4.5 V, I_D = 2.5 A
V_DS = 15 V, I_D = 3.3 A
I_S = 1.7 A, V_GS = 0 V
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
Q_g
Q_gs
Q_gd
t_d(on)
t_r
t_d(off)
t_f
t_rr
V_DS = 30 V, V_GS = 10 V, I_D = 3.3 A
V_DD = 30 V, R_L = 30 W
I_D ^ 1 A, V_GEN = 10 V, R_G = 6 W
I_F = 1.7 A, di/dt = 100 A/ms
Notes
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width v 300 ms, duty cycle v 2%.
Min Typ^a Max Unit
1.0
V
"100 nA
1
mA
25
10
A
0.10
W
0.20
7.0
S
0.8
1.2
V
15
30
2.1
nC
4.5
9
25
10
30
25
50
ns
14
40
70
100
2
Siliconix
S-47958—Rev. G, 15-Apr-96