K0900E70 Datasheet, PDF (185/224 Pages) Teccor Electronics – Thyristor Product Catalog

AN1009
9
Miscellaneous Design Tips and Facts
Introduction
This application note presents design tips and facts on the follow-
ing topics:
• Relationship of I_AV, I_RMS, and I_PK
• dv/dt Definitions
• Examples of gate terminations
• Curves for Average Current at Various Conduction Angles
• Double-exponential Impulse Waveform
• Failure Modes of Thyristor
• Characteristics Formulas for Phase Control Circuits
Relationship of I_AV, I_RMS, and I_PK
Since a single rectifier or SCR passes current in one direction
only, it conducts for only half of each cycle of an AC sinewave.
The average current (I_AV) then becomes half of the value deter-
mined for full-cycle conduction, and the RMS current (I_RMS) is
equal to the square root of half the mean-square value for full-
cycle conduction or half the peak current (I_PK). In terms of half-
cycle sinewave conduction (as in a single-phase half-wave cir-
cuit), the relationships of the rectifier currents can be shown as
follows:
I_PK = π I_AV = 3.14 I_AV
I_AV = (1/π) I_PK = 0.32 I_PK
I_PK = 2 I_RMS
I_RMS = 0.5 I_PK
I_AV = (2/π) I_RMS = 0.64 I_RMS
I_RMS = (π/2) I_AV = 1.57 I_AV
When two identically rated SCRs are connected inverse parallel
for full-wave operation, as shown in Figure AN1009.1, they can
handle 1.41 times the RMS current rating of either single SCR.
Therefore, the RMS value of two half sinewave current pulses in
one cycle is √2 times the RMS value of one such pulse per cycle.
dv/dt Definitions
The rate-of-rise of voltage (dv/dt) of an exponential waveform is
63% of peak voltage (excluding any overshoots) divided by the
time at 63% minus 10% peak voltage. (Figure AN1009.2)
Exponential dv/dt = 0.63 • [V_PK] = (t₂ – t1)
Resistor Capacitor circuit t = RC = (t₂ – t1)
Resistor Capacitor circuit 4 • RC = (t₃ – t₂)
(Peak Value)
100%
63%
Numerical dv/dt
10%
0%
t0 t1
t2
Time
t3
Figure AN1009.2 Exponential dv/dt Waveform
The rate-of-rise of voltage (dv/dt) of a linear waveform is 80% of
peak voltage (excluding any overshoots) divided by the time at
90% minus 10% peak voltage. (Figure AN1009.3)
Linear dv/dt = 0.8 • [V_PK] = (t₂ – t1)
Linear dv/dt = [0.9 • V_PK – 0.1 • V_PK] = (t₂ – t1)
90%
Figure AN1009.1 SCR Anti-parallel Circuit
©2002 Teccor Electronics
Thyristor Product Catalog
10%
0%
t0 _t1
t2
Time
Figure AN1009.3 Linear dv/dt Waveform
AN1009 - 1
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