C0402C0G1C220KT Datasheet, PDF (17/34 Pages) TDK Electronics – MULTILAYER CERAMIC CHIP CAPACITORS

No.
Process
3 Designing
P.C.board
Condition
4) Recommended chip capacitors layout is as following.
Disadvantage against
bending stress
Advantage against
bending stress
Perforation or slit
Perforation or slit
Mounting
face
Break P.C.board with
mounted side up.
Mount perpendicularly to
perforation or slit
Chip
arrangement
(Direction)
Perforation or slit
Break P.C.board with
mounted side down.
Mount in parallel with
perforation or slit
Perforation or slit
Closer to slit is higher stress Away from slit is less stress
₁
₂
Distance from
slit
(₁ < ₂ )
(₁ < ₂ )
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