C0402C0G1C220KT Datasheet, PDF (10/34 Pages) TDK Electronics – MULTILAYER CERAMIC CHIP CAPACITORS

(continued)
No.
Item
Performance
15 Moisture External
No mechanical damage.
Resistance appearance
(Steady
Capacitance
State)
Characteristics
Change from the
value before test
Class1
CH
C0G
±5% or ±0.5pF,
whichever larger.
JB
X5R
*Class2
X6S
X7R
X7S
X7T
± 10 %
± 12.5 %
± 25 %
* Applied for some parts.
Q
(Class1)
Rated Capacitance
Q
30pF and over
350 min.
10pF and over
under 30pF
275+5/2×C min.
Under 10pF 200+10×C min.
C : Rated capacitance (pF)
D.F.
(Class2)
200% of initial spec. max.
Insulation
Resistance
1,000MΩ or 50MΩ·μF min.
(As for the capacitors of rated
voltage 16, 10V DC and lower,
1,000 MΩ or 10MΩ·μF min.,)
whichever smaller.
Test or inspection method
Reflow solder the capacitors on a
P.C.Board shown in Appendix 1a or
Appendix 1b before testing.
Leave at temperature 40 ± 2°C, 90 to
95%RH for 500 +24,0h.
Leave the capacitors in ambient
condition for 6 to 24h (Class1) or 24 ±
2h (Class2) before measurement.
—9—