M58LR128HT Datasheet, PDF (9/112 Pages) STMicroelectronics – 128 Mbit (8 Mb ×16, Multiple Bank, Multilevel interface, Burst) 1.8 V supply Flash memories

M58LR128HT, M58LR128HB
Description
Time-Programmable (OTP) by the user. The user programmable segment can be
permanently protected. Figure 4, shows the Protection Register Memory Map.
The M58LR128HT/B are offered in a VFBGA56, 7.7 × 9 mm, 0.50 mm pitch package. They
are supplied with all the bits erased (set to ’1’).
Figure 1. Logic diagram
VDD VDDQ VPP
A0-A22
W
E
G
RP
WP
L
K
16
DQ0-
DQ15
M58LR128HT
M58LR128HB
WAIT
VSS VSSQ
AI12358
Table 1.
A0-A22
Signal names
Address Inputs
DQ0-DQ15
Data Input/Outputs, Command Inputs
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset
WP
Write Protect
K
Clock
L
Latch Enable
WAIT
Wait
V_DD
V_DDQ
V_PP
V_SS
V_SSQ
NC
Supply Voltage
Supply Voltage for Input/Output Buffers
Optional Supply Voltage for Fast Program & Erase
Ground
Ground Input/Output Supply
Not Connected Internally
DU
Do Not Use
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