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| M58WR032FT Datasheet, PDF (83/86 Pages) STMicroelectronics – 32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory | |||
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M58WR032FT, M58WR032FB
Table 42. Command Interface States - Lock Table, Next State
Command Input
Current CI State
Lock/CR
Setup(4)
(60h)
OTP Setup
(4)
(C0h)
Block Lock
Confirm
(01h)
Block
Lock-Down
Confirm
(2Fh)
Set CR
Confirm
(03h)
Ready
Lock/CR
Setup
OTP Setup
Ready
Lock/CR Setup
Ready (Lock error)
Ready
OTP
Setup
Busy
OTP Busy
Setup
Program Busy
Program Busy
Program Busy
Suspend
Program Suspended
Setup
Ready (error)
Busy
Erase Busy
Erase
Suspend
Lock/CR
Setup in
Erase
Suspend
Erase Suspended
Program in
Erase
Suspend
Setup
Busy
Suspend
Program Busy in Erase Suspend
Program Busy in Erase Suspend
Program Suspend in Erase Suspend
Lock/CR Setup
in Erase Suspend
Erase Suspend (Lock error)
Erase Suspend
Setup
Ready (error)
EFP
Busy
EFP Busy (2)
Verify
EFP Verify (2)
QuadEFP
Setup
Busy
Quad EFP Busy (2)
Quad EFP Busy (2)
EFP Exit,
Quad EFP
Exit (3)
Illegal
Command
(5)
P/E. C.
Operation
Completed
Ready (Lock error)
N/A
N/A
N/A
Ready
N/A
Ready
N/A
N/A
Ready
N/A
N/A
Erase
Suspended
N/A
Erase Suspend (Lock
error)
N/A
N/A
EFP Verify EFP Busy(2)
N/A
Ready EFP Verify(2) Ready
N/A
Ready
Quad EFP
Busy(2)
Ready
Note: 1. CI = Command Interface, CR = Configuration Register, EFP = Enhanced Factory Program, Quad EFP = Quadruple Enhanced Fac-
tory Program, P/E. C. = Program/Erase Controller.
2. EFP and Quad EFP are allowed only when Status Register bit SR0 is set to â0â. EFP and Quad EFP are busy if Block Address is
first EFP Address. Any other commands are treated as data.
3. EFP and Quad EFP exit when Block Address is different from first Block Address and data is FFFFh.
4. If the P/E.C. is active, both cycles are ignored.
5. Illegal commands are those not defined in the command set.
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