M58WR032FT Datasheet, PDF (68/86 Pages) STMicroelectronics – 32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory

M58WR032FT, M58WR032FB
M58WR032FT (top)
Offset
Data
M58WR032FB (bottom)
Offset
Data
Description
Bank Region 2 (Erase Block Type 1): Page mode and
synchronous mode capabilities (defined in table 10)
(P+35)h = 6Eh
03h
(P+3D)h = 76h
03h
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(P+36)h = 6Fh 07h
(P+37)h = 70h 00h
(P+38)h = 71h 20h
(P+39)h = 72h 00h
Bank Region 2 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical-sized erase blocks
Bits 16-31: n×256 = number of bytes in erase block region
(P+3A)h = 73h 64h
(P+3B)h = 74h 00h
Bank Region 2 (Erase Block Type 2)
Minimum block erase cycles × 1000
(P+3C)h = 75h 01h
Bank Region 2 (Erase Block Type 2): BIts per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+3D)h = 76h 03h
Bank Region 2 (Erase Block Type 2): Page mode and
synchronous mode capabilities (defined in table 10)
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(P+3E)h = 77h
(P+3E)h = 77h
Feature Space definitions
(P+3F)h = 78h
(P+3F)h = 78h
Reserved
Note: 1. The variable P is a pointer which is defined at CFI offset 15h.
2. Bank Regions. There are two Bank Regions, see Table 28. and Table 29.
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