STM32F410X8 Datasheet, PDF (79/142 Pages) STMicroelectronics – Clock, reset and supply management

STM32F410x8/B
Electrical characteristics
Table 38. High-speed external user clock characteristics
Symbol
Parameter
Conditions
Min Typ Max Unit
f_{HSE_ext}
External user clock source
frequency⁽¹⁾
1
-
50 MHz
V_HSEH OSC_IN input pin high level voltage
0.7V_DD -
V_DD
V
V_HSEL OSC_IN input pin low level voltage
-
V_SS
- 0.3V_DD
t_w(HSE)
t_w(HSE)
t_r(HSE)
t_f(HSE)
OSC_IN high or low time⁽¹⁾
OSC_IN rise or fall time⁽¹⁾
5
-
-
ns
-
-
10
C_in(HSE) OSC_IN input capacitance⁽¹⁾
-
-
5
-
pF
DuCy_(HSE) Duty cycle
-
45
-
55
%
I_L
OSC_IN Input leakage current
V_SS ≤V_IN ≤V_DD
-
-
±1
µA
1. Guaranteed by design.
Low-speed external user clock generated from an external source
In bypass mode the LSE oscillator is switched off and the input pin is a standard I/O. The
external clock signal has to respect the Table 55. However, the recommended clock input
waveform is shown in Figure 20.
The characteristics given in Table 39 result from tests performed using an low-speed
external clock source, and under ambient temperature and supply voltage conditions
summarized in Table 15.
Table 39. Low-speed external user clock characteristics
Symbol
Parameter
Conditions
Min
Typ
f_{LSE_ext}
User External clock source
frequency⁽¹⁾
V_LSEH
OSC32_IN input pin high level
voltage
V_LSEL OSC32_IN input pin low level voltage
t_w(LSE)
t_f(LSE)
OSC32_IN high or low time⁽¹⁾
t_r(LSE)
t_f(LSE)
C_in(LSE)
OSC32_IN rise or fall time⁽¹⁾
OSC32_IN input capacitance⁽¹⁾
DuCy_(LSE) Duty cycle
I_L
OSC32_IN Input leakage current
1. Guaranteed by design.
-
-
-
V_SS ≤ V_IN ≤ V_DD
-
32.768
0.7V_DD
-
V_SS
-
450
-
-
-
-
5
30
-
-
-
Max
1000
V_DD
0.3V_DD
-
50
-
70
±1
Unit
kHz
V
ns
pF
%
µA
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