STM32F405VGT6 Datasheet, PDF (78/185 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

Electrical characteristics
STM32F405xx, STM32F407xx
Table 14. General operating conditions (continued)
Symbol
Parameter
Conditions
Min Typ Max Unit
Regulator ON:
1.2 V internal voltage on
V_{CAP_1}/V_{CAP_2} pins
V₁₂
Regulator OFF:
VOS bit in PWR_CR register = 0⁽¹⁾
Max frequency 144MHz
1.08
1.14
1.20
V
VOS bit in PWR_CR register= 1
Max frequency 168MHz
1.20 1.26 1.32
V
Max frequency 144MHz
1.10 1.14 1.20 V
1.2 V external voltage must be
supplied from external regulator
on V_{CAP_1}/V_{CAP_2} pins
Max frequency 168MHz
1.20 1.26 1.30 V
Input voltage on RST and FT
pins⁽⁶⁾
V_IN
Input voltage on TTa pins
2 V ≤ V_DD ≤ 3.6 V
V_DD ≤ 2 V
–0.3
-
5.5
–0.3
–0.3
-
5.2
-
V_DDA+
V
0.3
Input voltage on B pin
-
5.5
LQFP64
-
435
LQFP100
Power dissipation at T_A = 85 °C _LQFP144
P_D
for suffix 6
suffix 7⁽⁷⁾
or
T_A
=
105
°C
for
LQFP176
UFBGA176
-
465
-
500
mW
-
526
-
513
WLCSP90
-
543
Ambient temperature for 6 suffix ^{Maximum power dissipation}
–40
version
Low power dissipation⁽⁸⁾
–40
TA
Ambient temperature for 7 suffix ^{Maximum power dissipation}
–40
version
Low power dissipation⁽⁸⁾
–40
85
°C
105
105
°C
125
TJ Junction temperature range
6 suffix version
7 suffix version
–40
105
°C
–40
125
1. The average expected gain in power consumption when VOS = 0 compared to VOS = 1 is around 10% for the whole
temperature range, when the system clock frequency is between 30 and 144 MHz.
2.
Van_{DDe/xVteDrDnAaml pinoiwmeurmsuvpaplulyesoufp1e.r7viVsoisr}
obtained when the device
(refer to Section : Internal
operates in reduced
reset OFF).
temperature
range,
and
with
the
use
of
3. When the ADC is used, refer to Table 67: ADC characteristics.
4. If V_REF+ pin is present, it must respect the following condition: V_DDA-V_REF+ < 1.2 V.
5. _{VIt D}is_DAreccaonmbmeetnodleerdatteodpdouwreinrgVp_{DoDwaenrd-uVpDaDnAdfrpoomwethr-edosawmneopseoruartcioen. .A} maximum difference of 300 mV between V_DD and
6. To sustain a voltage higher than V_DD+0.3, the internal pull-up and pull-down resistors must be disabled.
7. If T_A is lower, higher P_D values are allowed as long as T_J does not exceed T_Jmax.
8. In low power dissipation state, T_A can be extended to this range as long as T_J does not exceed T_Jmax.
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